MT9044, MT9044AL, MT9044AP Selling Leads, Datasheet
MFG:MITEL Package Cooled:QFP D/C:N/A
MT9044, MT9044AL, MT9044AP Datasheet download

Part Number: MT9044
MFG: MITEL
Package Cooled: QFP
D/C: N/A
MFG:MITEL Package Cooled:QFP D/C:N/A
MT9044, MT9044AL, MT9044AP Datasheet download

MFG: MITEL
Package Cooled: QFP
D/C: N/A
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PDF/DataSheet Download
Datasheet: MT9044
File Size: 123594 KB
Manufacturer: MITEL [Mitel Networks Corporation]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: MT9044AL
File Size: 123594 KB
Manufacturer: MITEL [Mitel Networks Corporation]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: MT9044AP
File Size: 123594 KB
Manufacturer: MITEL [Mitel Networks Corporation]
Download : Click here to Download
| Parameter | Symbol | Min. | Max. | Units | |
| 1 | Supply Voltage | VDD | -0.3 | 7.0 | V |
| 2 | Voltage on any pin | VPIN | -0.3 | VDD+0.3 | V |
| 3 | Current on any pin | IPIN | 20 | mA | |
| 4 | Storage temperature | TST | -55 | 125 | |
| 5 | PLCC package power dissipation | PPD | 900 | mW | |
| 6 | MQFP package power dissipation | PPD | 900 | mW |

The MT9044 T1/E1/OC3 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links and STS-3/0C3 links.
The MT9044 generates ST-BUS clock and framing signals that are phase locked to either a 2.048MHz, 1.544MHz, or 8kHz input reference.
The MT9044 is compliant with AT&T TR62411 and Bellcore GR-1244-CORE Stratum 3, Stratum 4 Enhanced, and Stratum 4; and ETSI ETS 300 011. It will meet the jitter/wander tolerance, jitter/wander transfer, intrinsic jitter/wander, frequency accuracy, capture range, phase change slope, holdover frequency and MTIE requirements for these specifications.
| Parameter | Symbol | Min. | Max. | Units | |
| 1 | Supply Voltage | VDD | -0.3 | 7.0 | V |
| 2 | Voltage on any pin | VPIN | -0.3 | VDD+0.3 | V |
| 3 | Current on any pin | IPIN | 20 | mA | |
| 4 | Storage temperature | TST | -55 | 125 | |
| 5 | PLCC package power dissipation | PPD | 900 | mW | |
| 6 | MQFP package power dissipation | PPD | 900 | mW |

The MT9044 T1/E1/OC3 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links and STS-3/0C3 links.
The MT9044 generates ST-BUS clock and framing signals that are phase locked to either a 2.048MHz, 1.544MHz, or 8kHz input reference.
The MT9044 is compliant with AT&T TR62411 and Bellcore GR-1244-CORE Stratum 3, Stratum 4 Enhanced, and Stratum 4; and ETSI ETS 300 011. It will meet the jitter/wander tolerance, jitter/wander transfer, intrinsic jitter/wander, frequency accuracy, capture range, phase change slope, holdover frequency and MTIE requirements for these specifications.
| Parameter | Symbol | Min. | Max. | Units | |
| 1 | Supply Voltage | VDD | -0.3 | 7.0 | V |
| 2 | Voltage on any pin | VPIN | -0.3 | VDD+0.3 | V |
| 3 | Current on any pin | IPIN | 20 | mA | |
| 4 | Storage temperature | TST | -55 | 125 | |
| 5 | PLCC package power dissipation | PPD | 900 | mW | |
| 6 | MQFP package power dissipation | PPD | 900 | mW |
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