NDP6050L, NDP6051, NDP605A Selling Leads, Datasheet
MFG:FSC Package Cooled:TO220 D/C:TO
NDP6050L, NDP6051, NDP605A Datasheet download

Part Number: NDP6050L
MFG: FSC
Package Cooled: TO220
D/C: TO
MFG:FSC Package Cooled:TO220 D/C:TO
NDP6050L, NDP6051, NDP605A Datasheet download

MFG: FSC
Package Cooled: TO220
D/C: TO
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PDF/DataSheet Download
Datasheet: NDP6050L
File Size: 68154 KB
Manufacturer: FAIRCHILD [Fairchild Semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: NDP6051
File Size: 68630 KB
Manufacturer: FAIRCHILD [Fairchild Semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: NDP605A
File Size: 188956 KB
Manufacturer: NSC [National Semiconductor]
Download : Click here to Download
These logic level N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
| Symbol |
Parameter |
NDP6050L |
NDB6050L |
Units |
| VDSS | Drain-Source Voltage |
50 |
V | |
| VDGR | Drain-Gate Voltage (RGS < 1 M) |
50 |
V | |
| VDSS | Gate-Source Voltage - Continuous - Nonrepetitive (tP < 50 µs) |
± 16 |
V | |
|
± 25 | ||||
| ID | Drain Current - Continuous - Pulsed |
48 |
A | |
|
144 | ||||
| PD | Total Power Dissipation @ TC = 25°C Derate above 25°C |
100
|
W | |
|
0.67 |
W/ | |||
| TJ,TSTG | Operating and Storage Temperature |
-65 to 175 |
||
| TL | Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds |
275 |
||
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
| Symbol | Parameter | NDP6051 | NDB6051 |
Units |
| VDSS | Drain-Source Voltage |
50 |
V | |
| VDGR | Drain-Gate Voltage (RGS 1 M) |
50 |
V | |
| VGSS | Gate-Source Voltage - Continuous - Nonrepetitive (tP < 50 s) |
± 20 |
V | |
|
± 40 | ||||
| ID | Drain Current - Continuous - Pulsed |
48 |
A | |
|
144 | ||||
| PD | Total Power Dissipation @ TC = 25°C Derate above 25°C |
100 |
W | |
|
0.67 |
W/ | |||
| TJ,TSTG | Operating and Storage Temperature Range |
-65 to 175 |
||
| TL | Maximum lead temperature for soldering purposes,1/8" from case for 5 seconds |
275 |
||
