PCA9554.D, PCA9554A, PCA9554AD.118 Selling Leads, Datasheet
MFG:PHI Package Cooled:SOP16W D/C:2007+
PCA9554.D, PCA9554A, PCA9554AD.118 Datasheet download
Part Number: PCA9554.D
MFG: PHI
Package Cooled: SOP16W
D/C: 2007+
PCA9554.D, PCA9554A, PCA9554AD.118
- Table of contents:
Info of PCA9554.D
Info of PCA9554A
Info of PCA9554AD.118
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About PCA0102A
PDF/DataSheet Download
Datasheet: PCA0102A
File Size: 58014 KB
Manufacturer: ZCOMM [Z-Communications, Inc]
Download : Click here to Download
About PCA9554A
PDF/DataSheet Download
Datasheet: PCA9554A
File Size: 188183 KB
Manufacturer: PHILIPS [Philips Semiconductors]
Download : Click here to Download
About PCA0102A
PDF/DataSheet Download
Datasheet: PCA0102A
File Size: 58014 KB
Manufacturer: ZCOMM [Z-Communications, Inc]
Download : Click here to Download
PCA9554A General Description
The PCA9554 and PCA9554A are 16-pin CMOS devices that provide 8 bits of General Purpose parallel Input/Output (GPIO)expansion for I2 C/SMBus applications and were developed to enhance the Philips family of IC I/O expanders. The improvements include higher drive capability, 5V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors,pushbuttons, LEDs, fans, etc.
The PCA9554/54A consist of an 8-bit Configuration register (Input or Output selection); 8-bit Input register, 8-bit Output register and an 8-bit Polarity inversion register (Active-HIGH or Active-LOW operation). The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each Input or Output is kept in the corresponding Input or Output register.
The polarity of the read register can be inverted with the Polarity Inversion Register. All registers can be read by the system master.Although pin to pin and I2 C address compatible with the PCF8574 series, software changes are required due to the enhancements and are discussed in Application Note AN469.
The PCA9554/54A open-drain interrupt output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system master that an input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine.
Three hardware pins (A0, A1, A2) vary the fixed I2 C address and allow up to eight devices to share the same I2C/SMBus. The PCA9554A is identical to the PCA9554 except that the fixed I2C address is different allowing up to sixteen of these devices (eight of each) on the same I2 C/SMBus.
The PCA9554/54A consist of an 8-bit Configuration register (Input or Output selection); 8-bit Input register, 8-bit Output register and an 8-bit Polarity inversion register (Active-HIGH or Active-LOW operation). The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each Input or Output is kept in the corresponding Input or Output register.
The polarity of the read register can be inverted with the Polarity Inversion Register. All registers can be read by the system master.Although pin to pin and I2 C address compatible with the PCF8574 series, software changes are required due to the enhancements and are discussed in Application Note AN469.
The PCA9554/54A open-drain interrupt output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system master that an input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine.
Three hardware pins (A0, A1, A2) vary the fixed I2 C address and allow up to eight devices to share the same I2C/SMBus. The PCA9554A is identical to the PCA9554 except that the fixed I2C address is different allowing up to sixteen of these devices (eight of each) on the same I2 C/SMBus.
PCA9554A Maximum Ratings
|
SYMBOL |
PARAMETER |
CONDITIONS |
MIN |
MAX |
UNIT |
|
VDD |
Supply voltage |
0.5 |
6.0 |
V | |
|
II |
DC input current |
- |
±20 |
mA | |
|
VI/O |
DC voltage on an I/O |
VSS0.5 |
5.5 |
V | |
|
II/O |
DC output current on an I/O |
- |
±50 |
mA | |
|
IDD |
Supply current |
- |
85 |
mA | |
|
ISS |
Supply current |
- |
100 |
mA | |
|
Ptot |
Total power dissipation |
- |
200 |
mW | |
|
Tstg |
Storage temperature range |
65 |
+150 |
°C | |
|
Tamb |
Operating ambient temperature |
40 |
+85 |
°C |
PCA9554A Features
*Operating power supply voltage range of 2.3 to 5.5 V
*5 V tolerant I/Os
*Polarity inversion register
*Active-LOW interrupt output
*Low stand-by current
*Noise filter on SCL/SDA inputs
*No glitch on power-up
*Internal power-on reset
*8 I/O pins which default to 8 inputs
*0 to 400 kHz clock frequency
*ESD protection exceeds 2000 V HBM per JESD22-A114,200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
*Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA
*Six packages offered: DIP16, SO16, SSOP16, SSOP20,TSSOP16, and HVQFN16
*5 V tolerant I/Os
*Polarity inversion register
*Active-LOW interrupt output
*Low stand-by current
*Noise filter on SCL/SDA inputs
*No glitch on power-up
*Internal power-on reset
*8 I/O pins which default to 8 inputs
*0 to 400 kHz clock frequency
*ESD protection exceeds 2000 V HBM per JESD22-A114,200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
*Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA
*Six packages offered: DIP16, SO16, SSOP16, SSOP20,TSSOP16, and HVQFN16
PCA9554A Connection Diagram
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