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PLHS18P8M, PLHS473N, PLHS501

PLHS18P8M, PLHS473N, PLHS501 Selling Leads, Datasheet

MFG:S  Package Cooled:PLCC  D/C:00+

PLHS18P8M, PLHS473N, PLHS501 Picture

PLHS18P8M, PLHS473N, PLHS501 Datasheet download

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Part Number: PLHS18P8M

 

MFG: S

Package Cooled: PLCC

D/C: 00+

 

 

 
 
 
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About PLH10AN1522R0A2B

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Datasheet: PLH10AN1522R0A2B

File Size: 430839 KB

Manufacturer: Murata Manufacturing Co., Ltd.

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About PLH10AN1522R0A2B

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Datasheet: PLH10AN1522R0A2B

File Size: 430839 KB

Manufacturer: Murata Manufacturing Co., Ltd.

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About PLHS501

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Datasheet: PLHS501

File Size: 86804 KB

Manufacturer: PHILIPS [Philips Semiconductors]

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PLHS501 General Description

The PLHS501 is a high-density Bipolar Programmable Macro Logic device. PML incorporates a programmable NAND structure. The NAND architecture is an efficient method for implementing any logic function. The SNAP software development system provides a user friendly environment for design entry. SNAP eliminates the need for a detailed understanding of the PLHS501 architecture and makes it transparent to the user. PLHS501 is also supported on the Philips Semiconductors SNAP software development systems.

The PLHS501 is ideal for a wide range of microprocessor support functions, including bus interface and control applications.

The PLHS501 is also processed to industrial requirements for operation over an extended temperature range of 40°C to +85°C and supply voltage of 4.5V to 5.5V.

PLHS501 Maximum Ratings

SYMBOL
PARAMETER
RATINGS
UNIT
MIN.
MAX.
Vcc
Supply voltage  
+7
VDC
Vin
Input voltage  
+5.5
VDC
VOUT
Output voltage  
+5.5
VDC
IIN
Input currents
-30
+30
mA
IOUT
Output currents  
+100
mA
TAMB
Operating temperature range
0
+75
TSLD
soldering temperature range
-65
+150


NOTE:
1. Stresses above those listed may cause malfunction or permanent damage to the device. This is a stress rating only. Functional operation at these or any other condition above those indicated in the operational and programming specification of the device is not implied.

PLHS501 Features

• Programmable Macro Logic device
• Full connectivity
• TTL compatible
• SNAP development system: Supports third-party schematic entry formats Macro library Versatile netlist format for design portability Logic, timing, and fault simulation
• Delay per internal NAND function = 6.5ns (typ)
• Testable in unprogrammed state
• Security fuse allows protection of proprietary designs

PLHS501 Connection Diagram

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