PM3380-XC-FP, PM3386, PM3386-B1 Selling Leads, Datasheet
MFG:PMC Package Cooled:BGA D/C:N/A
PM3380-XC-FP, PM3386, PM3386-B1 Datasheet download
Part Number: PM3380-XC-FP
MFG: PMC
Package Cooled: BGA
D/C: N/A
PM3380-XC-FP, PM3386, PM3386-B1
- Table of contents:
Info of PM3380-XC-FP
Info of PM3386
Info of PM3386-B1
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About PM300
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Datasheet: PM300
File Size: 454319 KB
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About PM3386
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Datasheet: PM3386
File Size: 2513928 KB
Manufacturer: PMC [PMC-Sierra, Inc]
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About PM300
PDF/DataSheet Download
Datasheet: PM300
File Size: 454319 KB
Manufacturer:
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PM3386 General Description
This Reference Design Board utilizes a 6U cPCI form factor and may only be tested within the cPCI environment. This system is composed of a cPCI chassis, the S/UNI-2xGE Reference Design PCB, single board computer with PCI support and operating system SW, and an external PC with terminal emulation software. In addition, an external Gigabit Ethernet test setup, such as a SmartBits unit is required to generate traffic and run system tests. The cPCI chassis in conjunction with a custom system side backplane provides expansion capability for a multiservice reference system implementation.
PM3386 Features
· One PM3386 S/UNI-2xGE.
· Two Gigabit Ethernet capable Optical Transceivers.
· Access to the standard GMII interface via a high speed matched impedance connector.
· FPGA capable of supporting the 100MHz POS-PHY Level 3 interface for drop-side loop back, trfansparent or packet processing operations.
· One PLX PCI9030 Interface chip for interfacing to the host processor.
· Reference oscillators required for Gigabit Ethernet and POS-PHY L3 interfaces.
· Powered by +1.8 and +3.3 Volt supplies. +5.0 Volt components are avoided where possible.
· Two Gigabit Ethernet capable Optical Transceivers.
· Access to the standard GMII interface via a high speed matched impedance connector.
· FPGA capable of supporting the 100MHz POS-PHY Level 3 interface for drop-side loop back, trfansparent or packet processing operations.
· One PLX PCI9030 Interface chip for interfacing to the host processor.
· Reference oscillators required for Gigabit Ethernet and POS-PHY L3 interfaces.
· Powered by +1.8 and +3.3 Volt supplies. +5.0 Volt components are avoided where possible.
PM3386 Typical Application
The S/UNI-2xGE Reference Design demonstrates a physical interface implementation for Gigabit Ethernet that can be used in the following applications where ethernet services are deployed.
· Core/Edge Routers
· Multi-Service Switches/Routers
· SONET/SDH Transport Muxes
These applications typically integrate various interfaces including Gigabit Ethernet, ATM, SONET, or DS3. With the POS-PHY interface, numerous service cards implementing various physical layer protocols can be integrated into a common architecture implementing higher layer functions such as scheduling and traffic classification. This type of modularity increases expansion capabilities while simplifying line card development and aiding time to market. Connections between Edge and Core Routers within a POP, or Enterprise Routers and Multi- Service switches are also becoming attractive applications for Gigabit Ethernet. Please refer to the S/UNI-2xGE Technical Overview (PMC-1991728) for more information on S/UNI-2xGE applications.
The 2xGE reference design operates in one of two modes:
· PL3 Drop Side Loop Back
· PL3 Transparent.
The following sections outline in more detail these two options.
· Core/Edge Routers
· Multi-Service Switches/Routers
· SONET/SDH Transport Muxes
These applications typically integrate various interfaces including Gigabit Ethernet, ATM, SONET, or DS3. With the POS-PHY interface, numerous service cards implementing various physical layer protocols can be integrated into a common architecture implementing higher layer functions such as scheduling and traffic classification. This type of modularity increases expansion capabilities while simplifying line card development and aiding time to market. Connections between Edge and Core Routers within a POP, or Enterprise Routers and Multi- Service switches are also becoming attractive applications for Gigabit Ethernet. Please refer to the S/UNI-2xGE Technical Overview (PMC-1991728) for more information on S/UNI-2xGE applications.
The 2xGE reference design operates in one of two modes:
· PL3 Drop Side Loop Back
· PL3 Transparent.
The following sections outline in more detail these two options.
PM3386 Connection Diagram
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