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• 16,000 Usable PLD Gates with 118 I/Os • 300 MHz 16-bit Counters, 400 MHz Datapaths, 160+ MHz FIFOs • 0.35 m four-layer metal non-volatile CMOS process for smallest die sizes
QL4016 Typical Application
•Interfaces with both 3.3 V and 5.0 V devices • PCI compliant with 3.3 V and 5.0 V busses for -1/-2/-3/-4 speed grades • Full JTAG boundary scan • I/O Cells with individually controlled Registered Input Path and Output Enables