S-75V14ANC, S-75V14ANC-5VA-TF, S-75V32ANC Selling Leads, Datasheet
MFG:SEIKO Package Cooled:SOT-353 D/C:08+
S-75V14ANC, S-75V14ANC-5VA-TF, S-75V32ANC Datasheet download
Part Number: S-75V14ANC
MFG: SEIKO
Package Cooled: SOT-353
D/C: 08+
MFG:SEIKO Package Cooled:SOT-353 D/C:08+
S-75V14ANC, S-75V14ANC-5VA-TF, S-75V32ANC Datasheet download
MFG: SEIKO
Package Cooled: SOT-353
D/C: 08+
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PDF/DataSheet Download
Datasheet: S-75V14ANC
File Size: 78938 KB
Manufacturer: Seiko Instruments Inc
Download : Click here to Download
PDF/DataSheet Download
Datasheet: S-7038AF
File Size: 1973848 KB
Manufacturer: SII [Seiko Instruments Inc]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: S-75V32ANC
File Size: 78820 KB
Manufacturer: Seiko Instruments Inc
Download : Click here to Download
The S-75V14ANC is a SCHMITT INVERTER fabricated by utilizing advanced silicon-gate CMOS technology which provides the inherent benefit of CMOS low power consumption to achieve ultra high speed operation correspond to LSTTL IC's.
All gates of the internal circuitry have buffered outputs to ensure high noise immunity and output stability.
Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and VCC. This allows for interfaces between power supplies of different voltage, output level conversion from 5 V to 3 V and battery backup applications.
Item | Symbol | Conditions | Ratings | Unit |
Power Supply Voltage | VCC | -0.5 to +7.0 | V | |
Input Voltage | VIN | -0.5 to +7.0 | V | |
Output Voltage | VOUT | -0.5 to VCC+0.5 | V | |
Input Parasitic Diode Current |
IIK | -20 | mA | |
Output Parasitic Diode Current |
IOK | ±20 | mA | |
Output Current | IOUT | ±25 | mA | |
VCC/GND Current | ICC | ±50 | mA | |
Power Dissipation | PD | 200 | mW | |
Storage Temp. Range | Tstg | -65 to +150 | °C | |
Lead Temperature (10 sec.) |
TL | 260 | °C |
The S-75V32ANC is a single 2-intput OR gate fabricated by utilizing advanced silicon-gate CMOS technology which provides the inherent benefit of CMOS low power consumption to achieve ultra high speed operation correspond to LSTTL IC's.
All gates of the internal circuitry have buffered outputs to ensure high noise immunity and output stability.
Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and VCC. This allows for interfaces between power supplies of different voltage, output level conversion from 5 V to 3 V and battery backup applications.
Item | Symbol | Conditions | Ratings | Unit |
Power Supply Voltage | VCC | -0.5 to +7.0 | V | |
Input Voltage | VIN | -0.5 to +7.0 | V | |
Output Voltage | VOUT | -0.5 to VCC+0.5 | V | |
Input Parasitic Diode Current |
IIK | -20 | mA | |
Output Parasitic Diode Current |
IOK | ±20 | mA | |
Output Current | IOUT | ±25 | mA | |
VCC/GND Current | ICC | ±50 | mA | |
Power Dissipation | PD | 200 | mW | |
Storage Temp. Range | Tstg | -65 to +150 | °C | |
Lead Temperature (10 sec.) |
TL | 260 | °C |