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SG1526J 18L CDIP, SG1527, SG1527A

SG1526J 18L CDIP, SG1527, SG1527A Selling Leads, Datasheet

MFG:LF(TEC)  Package Cooled:DIP18  D/C:07+

SG1526J 18L CDIP, SG1527, SG1527A Picture

SG1526J 18L CDIP, SG1527, SG1527A Datasheet download

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Part Number: SG1526J 18L CDIP

 

MFG: LF(TEC)

Package Cooled: DIP18

D/C: 07+

 

 

 
 
 
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  • SG10075054-101

  • Pack: DIP Qty: 2004  Adddate: 2024-05-02
  • Inquire Now
  • SLICCO COMPANY   China
    Contact: Ms.suedy  
    Tel: 86-0755-83740519
    Fax: 86-0755-83740529
    (4)

About SG1000GXH26

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Datasheet: SG1000GXH26

File Size: 211366 KB

Manufacturer: Toshiba

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SG1527 Suppliers

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About SG1527A

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Datasheet: SG1527A

File Size: 139064 KB

Manufacturer: LINER [Linear Technology]

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About SG1527A

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Datasheet: SG1527A

File Size: 139064 KB

Manufacturer: LINER [Linear Technology]

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SG1527A General Description

The SG1525A/1527A series of pulse width modulator integrated circuits are designed to offer improved performance and lower external parts count when usedto implement all types of switching power supplies.  The on-chip +5.1 volt reference is trimmed to !à1% initial accuracy and the input common-mode range of the erro amplifier includes the reference voltage, eliminating external potentiometers and divider resistors.  A Sync input to the oscillator allows multiple units to be slaved together, or a single unit to be synchronized to an external system clock.  A single pin and the Discharge pin provides a wide range of deadtime resistor between the CT adjustment.  These devices also feature built-in soft-start circuitry with only a timingcapacitor required externally. A Shutdown pin controls both the soft-start circuitry and the output stages, providing instantaneous turn-off with soft-start recycle for slow turn-on.  These functions are also controlled by an undervoltage lockout which keeps the outputs off and the soft-start capacitor discharged for input voltages less than that required for normal operation.  Another unique feature of these PWM circuits is a latch following the comparator.  Once a PWM pulse has been terminated for any reason, the outputs will remain off for the duration of the period.  The latch is reset with each clock pulse.  The output stages are totem-pole designs capable of sourcing or sinking in excess of 200mA.  The SG1525A output stage features NOR logic, giving a LOW output for an OFF state.  The SG1527A utilizes OR logic which results in a HIGH output level when OFF.

SG1527A Maximum Ratings

Supply Voltage  (+Vin)  .......................................................40V
Collector Supply Voltage (Vc) ...........................................   40V
Logic Inputs .......................................................   -0.3V to 5.5V
Analog Inputs .......................................................  -0.3V to Vin
Output Current, Source or Sink ...................................   500mA
Reference Load Current ...............................................    50mA
Oscillator Charging Current ............................................    5mA
Operating Junction Temperature Range

Hermetic (J, L Packages) .....................................             150
Plastic (N, DW Packages ) .......................................         150
Storage Temperature Range ..........................    -65 to 150
Lead Temperature (Soldering, 10 seconds) .................    300

Note 1.  Values beyond which damage may occur.

SG1527A Features

8V to 35V operation
5.1V reference trimmed to ±1%
100Hz to 500KHz oscillator range
Separate oscillator sync terminal
Adjustable deadtime control
Internal soft-start
Input undervoltage lockout
Latching P.W.M. to prevent multiplepulses
Dual source/sink output drivers

SG1527A Typical Application

1. Use an external transistor or open-collector comparator to pul down on the Comp terminal.  This will set the PWM latch turningoff both outputs.  If the shutdown signal is momentary, pulse-by-pulse protection can be accomplished as the PWM latch wil be reset with each clock pulse.

2. The same results can be accomplished by pulling down on the Soft-Start terminal with the difference that on this pin, shutdownwill not affect the amplifier compensation network but must discharge any Soft-Start capacitor.

3. Apply a positive-going signal to the Shutdown terminal.  This will provide most rapid shutdown of the outputs but will not immediately set the PWM latch if there is a Soft-Start capacitor.This capacitor will discharge but with a current of approxi-mately twice the charging current.

4. The shutdown terminal can be used to set the PWM latch on a pulse-by-pulse basis if there is no external capacitance on Soft-Start terminal.  Slow turn-on may still be accomplished by applying an external capacitor, blocking diode, and charging resistor to the comp terminal. (See SG1524 Application Note).

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