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TFP201PEP, TFP201PZP, TFP401-1PZP

Table of contents:
Info of TFP201PEP
Info of TFP201PZP
Info of TFP401-1PZP

TFP201PEP, TFP201PZP, TFP401-1PZP Selling Leads, Datasheet

MFG:Texas Instruments Category:Integrated Circuits (ICs) Package Cooled:TQFP1414-100 D/C:03+

TFP201PEP, TFP201PZP, TFP401-1PZP Datasheet download

Five Points

Part Number: TFP201PZP

Category: Integrated Circuits (ICs)

MFG: Texas Instruments

Package Cooled: TQFP1414-100

D/C: 03+

Description: IC PANELBUS DVI REC 100-HTQFP

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TFP201PZP Parameters

Technical/Catalog Information	TFP201PZP
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Number of Drivers/Receivers	-
Type	Receiver
Voltage - Supply	3 V ~ 3.6 V
Package / Case	100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP
Packaging	Tray
Protocol	-
Drawing Number	296; 4146929; PZP; 100
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	TFP201PZP TFP201PZP 296 9990 ND 2969990ND 296-9990

TFP201PZP General Description

The Texas Instruments TFP201 and TFP201A are TI PanelBusE flat panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP201/201A finds applications in any design requiring high-speed digital interface.

The TFP201/201A supports display resolutions up to SXGA in 24-bit true color pixel format. The TFP201/201A offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time staggered pixel outputs for reduced ground bounce.

PowerPADE advanced packaging technology results in best of class power dissipation, footprint, and ultra-low ground inductance.

The TFP201/201A combines PanelBusE circuit innovation with TI's advanced 0.18-mm EPIC-5E CMOS process technology, along with TI PowerPADE package technology to achieve a reliable, low-powered, low noise, high-speed digital interface solution.

TFP201PZP Maximum Ratings

Supply voltage range, DV_DD, AV_DD, OV_DD, PV_DD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3 V to 4 V
Input voltage range, logic/analog signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3 V to 4 V
Operating ambient temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to 150°C
Case temperature for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .260°C
Package power dissipation/PowerPADE: Soldered (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3 W
Not soldered (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7 W
ESD Protection, all pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 KV Human Body Model
JEDEC latchup (EIA/JESD78) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 mA
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Specified with PowerPAD bond pad on the backside of the package soldered to a 2 oz. Cu plate PCB thermal plane. Specified at
maximum allowed operating temperature, 70°C.
2. PowerPADE bond pad on the backside of the package is not soldered to a thermal plane. Specified at maximum allowed operating
temperature, 70°C.

TFP201PZP Features

` Supports SXGA Resolution
(Output Pixel Rates Up to 112 MHz)
` Digital Visual Interface (DVI) Specification Compliant1
` True-Color, 24 Bit/Pixel, 16.7M Colors at 1
or 2-Pixels Per Clock
` Laser Trimmed Internal Termination
Resistors for Optimum Fixed Impedance Matching
` Skew Tolerant Up to One Pixel Clock Cycle
` 4x Over-Sampling
` Reduced Power Consumption 1.8 V Core
Operation With 3.3 V I/Os and Supplies2
` Reduced Ground Bounce Using Time
Staggered Pixel Outputs
` Lowest Noise and Best Power Dissipation
Using TI PowerPADE Packaging
` Advanced Technology Using TI 0.18-mm
EPIC-5E CMOS Process
` TFP201A Incorporates HSYNC Jitter Immunity3

TFP201PZP Connection Diagram

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