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TPIC6259, TPIC6259DW, TPIC6259DWR

TPIC6259, TPIC6259DW, TPIC6259DWR Selling Leads, Datasheet

MFG:Texas Instruments  Category:Integrated Circuits (ICs)  Package Cooled:SOP  D/C:04+

TPIC6259DWR Picture

TPIC6259, TPIC6259DW, TPIC6259DWR Datasheet download

Five Points

Part Number: TPIC6259DWR

Category: Integrated Circuits (ICs)

MFG: Texas Instruments

Package Cooled: SOP

D/C: 04+

Description: IC 8-BIT ADDRESSABL LTCH 20SOIC

 

 
 
 
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About TPIC6259

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Datasheet: TPIC6259

File Size: 169288 KB

Manufacturer: TI [Texas Instruments]

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  • TPIC6259DW

  • Vendor: TI D/C: 06+& Qty: 745 Note: 1 day/In stock/ New original packing/ Rohs  Adddate: 2026-07-24
  • Inquire Now
  • SZ Sumzi Electronic Co., Ltd   China
    Contact: Ms.Willingsumzi   MSN:sales001@sumzi.com
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    Fax: 86-755-83299282
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  • obddo tech Co.,Ltd   China
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  • TPI8011N

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About TPIC6259DW

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Datasheet: TPIC6259DW

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  • TPI44L01E

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  • obddo tech Co.,Ltd   China
    Contact: Mr.cheng   MSN:obddo@msn.com
    Tel: 0086-0755-81105786
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  • TPI8011N

  • Vendor: ST Pack: SO D/C: 92+& Qty: 960 Note: IN STOCK  Adddate: 2026-07-24
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  • Trustful International Co.,Ltd   China
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Manufacturer: STMicroelectronics

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TPIC6259 General Description

This power logic 8-bit addressable latch controls open-drain DMOS transistor outputs and is designed for general-purpose storage applications in digital systems. Specific uses include working registers, serial-holding registers, and decoders or demultiplexers. This is a multifunctional device capable of storing single-line data in eight addressable latches with 3-to-8 decoding or demultiplexing mode active-low DMOS outputs.

Four distinct modes of operation are selectable by controlling the clear (CLR) and enable (G) inputs as enumerated in the function table. In the addressable-latch mode, data at the data-in (D) terminal is written into the addressed latch. The addressed DMOS transistor output inverts the data input with all unaddressed DMOS-transistor outputs remaining in their previous states. In the memory mode, all DMOS-transistor outputs remain in their previous states and are unaffected by the data or address inputs. To eliminate the possibility of entering erroneous data in the latch, enable G should be held high (inactive) while the address lines are changing. In the 3-to-8 decodingor demultiplexing mode, the addressed output is inverted with respect to the D input and all other outputs are high. In the clear mode, all outputs are high and unaffected by the address and data inputs.

Separate power and logic level ground pins are provided to facilitate maximum system flexibility. Pins 1, 10, 11, and 20 are internally connected, and each pin must be externally connected to the power system ground in order to minimize parasitic inductance. A single-point connection between pin 9, logic ground (LGND), and pins 1, 10, 11, and 20, power ground (PGND) must be externally made in a manner that reduces crosstalk between the logic and load circuits.

The TPIC6259 is characterized for operation over the operating case temperature range of 40°C to 125°C.

TPIC6259 Maximum Ratings

Logic supply voltage, VCC (see Note 1). . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . . . . . . . . . . . 7 V
Logic input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . .0.3 V to 7 V
Power DMOS drain-to-source voltage, VDS (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . .45 V
Continuous source-drain diode anode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A
Pulsed source-drain diode anode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 2 A
Pulsed drain current, each output, all outputs on, IDn, TA = 25°C (see Note 3) . . . . . .750 mA
Continuous drain current, each output, all outputs on, IDn, TA = 25°C . . . . . . . . . . . . 250 mA
Peak drain current single output, IDM, TA = 25°C (see Note 3) . . . . . . .. . . . .  . . . . . . . . . .2 A
Single-pulse avalanche energy, EAS (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 75 mJ
Avalanche current, IAS (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A
Continuous total power dissipation . . . . . . . . . . . . . . . .. . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . .  .40°C to 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds . . . . . . .. . . . . . . . . . . . 60°C

TPIC6259 Features

• Low rDS(on) . . . 1.3 W Typical
• Avalanche Energy . . . 75 mJ
• Eight Power DMOS Transistor Outputs of 250-mA Continuous Current
• 1.5-A Pulsed Current Per Output
• Output Clamp Voltage at 45 V
• Four Distinct Function Modes
• Low Power Consumption
 

TPIC6259 Connection Diagram

TPIC6259DWR Parameters

Technical/Catalog InformationTPIC6259DWR
VendorTexas Instruments
CategoryIntegrated Circuits (ICs)
Logic TypeD-Type, Addressable
Independent Circuits1
Circuit1:8
Output TypeStandard
Current - Output High, Low-
Mounting TypeSurface Mount
Package / Case20-SOIC (7.5mm Width)
PackagingTape & Reel (TR)
Operating Temperature-40°C ~ 125°C
Delay Time - Propagation625ps
Voltage - Supply4.5 V ~ 5.5 V
Drawing Number296; 4040000-4; DW; 20
Lead Free StatusContains Lead
RoHS StatusRoHS Non-Compliant
Other Names TPIC6259DWR
TPIC6259DWR

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