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TPIC6A595N, TPIC6A596, TPIC6A596DW

TPIC6A595N, TPIC6A596, TPIC6A596DW Selling Leads, Datasheet

MFG:TI  Package Cooled:DIP-20  D/C:09+

TPIC6A595N, TPIC6A596, TPIC6A596DW Picture

TPIC6A595N, TPIC6A596, TPIC6A596DW Datasheet download

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Part Number: TPIC6A595N

 

MFG: TI

Package Cooled: DIP-20

D/C: 09+

 

 

 
 
 
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About TPIC6A595NE

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Datasheet: TPIC6A595NE

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Manufacturer: TI [Texas Instruments]

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About TPIC6A596

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Datasheet: TPIC6A596

File Size: 203706 KB

Manufacturer: TI [Texas Instruments]

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  • obddo tech Co.,Ltd   China
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  • TPI8011N

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About TPIC6A596DW

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Datasheet: TPIC6A596DW

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TPIC6A596 General Description

The TPIC6A596 is a monolithic, high-voltage, high-current power logic 8-bit shift register designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other medium-current or high-voltage loads. Each open-drain DMOS transistor features an independent chopping current-limiting circuit to prevent damage in the case of a short circuit.

This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit, D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shiftregister clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shiftregister clear (SRCLR) is high. When SRCLR is low, the input shift register is cleared. When output enable (G) is held high, all data in the output buffers is held low and and all drain outputs are off. When G is held low, data from the storage register is transparent to the output buffers. The serial output (SER OUT) allows for cascading of the data from the shift register to additional devices.

Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and a 350-mA continuous sink current capability. When data in the output buffers is low, the DMOS-transistor outputs are off. When data is high, the DMOS-transistor outputs have sink current capability.

Separate power ground (PGND) and logic ground (LGND) terminals are provided to facilitate maximum system flexibility. All PGND terminals are internally connected, and each PGND terminal must be externally connected to the power system ground in order to minimize parasitic impedance. A single-point connection between LGND and PGND must be made externally in a manner that reduces crosstalk between the logic and load circuits.

The TPIC6A595 is offered in a thermally-enhanced dual-in-line (NE) package and a wide-body surface-mount (DW) package. The TPIC6A595 is characterized for operation over the operating case temperature range of 40°C to 125°C.

TPIC6A596 Maximum Ratings

Logic supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Logic input voltage range, VI  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 7 V
Power DMOS drain-to-source voltage, VDS (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 V
Continuous source-to-drain diode anode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 A
Pulsed source-to-drain diode anode current (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . ..2 A
Pulsed drain current, each output, all outputs on, IDn, TA = 25°C (see Note 3)  . . . . . . . . . .1.1 A
Continuous drain current, each output, all outputs on, IDn, TA= 25°C  . . . . . . . . . . . . . . .350 mA
Peak drain current single output, TA= 25°C (see Note 3)  . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 A
Single-pulse avalanche energy, EAS (see Figure 6)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 mJ
Avalanche current, IAS (see Note 4)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .600 mA
Continuous total dissipation  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating case temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40°C to 125°C
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . 40°C to 150°C
Storage temperature range, Tstg  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . .260°C 
 

TPIC6A596 Features

• Low rDS(on) . . . 1 Typ
• Output Short-Circuit Protection
• Avalanche Energy . . . 75 mJ
• Eight 350-mA DMOS Outputs
• 50-V Switching Capability
Enhanced Cascading for Multiple Stages
All RegistersCleared With Single Input
• Low Power Consumption

TPIC6A596 Connection Diagram

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