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The Texas Instruments TSB42AA9 (StorageLynx) is a 1394 Link Layer Controller designed to function as a native bridge between the 1394 bus and ATA (AT Attachment) or ATAPI (AT Attachment with Packet Interface) data storage applications. These data storage devices can include external hard disk drives (HDDs), ZIP drives, magneto-optical (MO) drives, ORB drives, CD-ROMs, CD-R/Ws, DVD-ROMs, and DVD-RAMs. The ATA/ATAPI interface of the TSB42AA9 supports signaling and timing for programmed input/output (PIO) modes 04, direct memory access (DMA) modes 02, and Ultra DMA modes 04. The 1394 interface of StorageLynx is IEEE P1394a[1] and IEEE Std 1394-1995[2] compliant, and it supports 400, 200, and 100 Mbps serial bus data rates.
StorageLynx is particularly designed for any data storage application that supports the SBP2[3] (Serial Bus Protocol 2) transaction layer as a target device. The TSB42AA9 automates the SBP-2 target controller functions by implementing the management and command agents in hardware. Data handling is also executed in hardware, with no assistance from the processor needed to setup a DMA transaction to fetch data from the ATA/ATAPI device and return it to the SBP-2 initiator via the 1394 bus. StorageLynx translates SBP-2 protocol commands to ATA/ATAPI commands using the hardware-implemented functions and an embedded 8052 processor executing firmware. The firmware is located in the internal ROM of the device or optionally, an external memory location.
A 2-wire serial bus interface is included on the TSB42AA9. This interface enables configuration ROM information required by IEEE Std 1394-1995[2] and SBP-2 to be loaded from a serial EEPROM into the device's internal parameter RAM. The internal parameter RAM allows StorageLynx faster access to important configuration information as well as automatic responses to configuration ROM read requests from the system host. In addition, StorageLynx provides a memory interface which can be used to access firmware from an external Flash PROM/EPROM for testing and development purposes, or to support storage applications which require specialized functionality. The StorageLynx memory interface also supports write operations to the Flash PROM/EPROM, removing the need for parts to be in sockets and allowing for easy software downloads. Flash memory is not required unless custom functionality and in-system reprogrammability are requirements.
TSB42AA9 Maximum Ratings
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4 V Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . .. 0.5 V to VCC + 0.5 V Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . ..±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 2) . . . . . . . ±20 mA Continuous total power dissipation . . . . See Maximum Dissipation Rating Table Operating free-air temperature range, TA TSB42AA9 . . . . . . . . . . 0°C to 70°C Operating free-air temperature range, TSB42AA9I . . . . . . . . . .40°C to 85°C NOTES: 1. This applies to external input and bidirectional buffers. 2. This applies to external output and bidirectional buffers.
TSB42AA9 Features
• Serial bus data rates of 100, 200, and 400 Mbps • IEEE P1394a compliant and IEEE Std 1394-1995 • Automated SBP-2 transport protocol engine • ATA/ATAPI command translation by embedded processor and firmware • Programmable ATA/ATAPI interface supporting PIO modes 04, DMA modes 02, and Ultra DMA modes 04 • Automated 1394 and SBP-2 header removal and insertion • Internal parameter RAM for fast access to configuration ROM and key SBP-2 parameters • Automatic response to configuration ROM quadlet and block read requests • External flash PROM / EPROM interface for easy program code changes during prototyping • Separate address and data busses for the external flash PROM / EPROM interface (no external latches) • 16K internal ROM program memory • 576 Byte (128 quadlet) transmit control FIFO, 576 byte (128 quadlet) receive control FIFO • Bidirectional data FIFO • 0.18 micron CMOS technology with embedded RAM and ROM • Space-saving 100 pin TQFP package