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·Integrated 400 Mbps 3-port PHY ·Compliant with IEEE 1394-1995 and IEEE 1394a-2000 standards ·Supports bus manager functions and automatic 1394 self-ID verification. ·Separate Async Ack FIFO decreases the ack-tracking burden on in-CPU and ex-CPU
TSB43CA42 Typical Application
`PID filtering for transmit function (up to 16 separate PIDs per HSDI) `Packet insertion two insertion buffers per HSDI `11 general-purpose inputs/outputs (GPIOs) `Interrupt driven to minimize CPU polling. `Single 3.3-V supply `JTAG interface to support post-assembly scan of device I/O boundary scan