TSS721AD PBF, TSS721ADRG4, TSS901E Selling Leads, Datasheet
MFG:TI Package Cooled:2009+ROHS D/C:08+/09+
TSS721AD PBF, TSS721ADRG4, TSS901E Datasheet download
Part Number: TSS721AD PBF
MFG: TI
Package Cooled: 2009+ROHS
D/C: 08+/09+
TSS721AD PBF, TSS721ADRG4, TSS901E
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Info of TSS721AD PBF
Info of TSS721ADRG4
Info of TSS901E
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About TSS10G45S
PDF/DataSheet Download
Datasheet: TSS10G45S
File Size: 219358 KB
Manufacturer: TOSHIBA [Toshiba Semiconductor]
Download : Click here to Download
About TSS10G45S
PDF/DataSheet Download
Datasheet: TSS10G45S
File Size: 219358 KB
Manufacturer: TOSHIBA [Toshiba Semiconductor]
Download : Click here to Download
About TSS901E
PDF/DataSheet Download
Datasheet: TSS901E
File Size: 299653 KB
Manufacturer: ATMEL [ATMEL Corporation]
Download : Click here to Download
TSS901E General Description
The TSS901E provides an interface between a Data-Strobe link - according to the IEEE Std 1355-1995 specification carrying a simple interprocessor communication protocol - and a data processing node consisting of a CPU and a communication and data memory.
The TSS901E offers hardware supported execution of the major parts of the interprocessor communication protocol: data transfer between two nodes of a multi-processor system is performed with minimal host CPU intervention. The TSS901E can execute simple commands to provide basic features for system control functions; a provision of fault tolerant features exists as well.
Although the TSS901E initial exploitation is for use in multi-processor systems where the high speed links standardisation is an important issue and where reliability is a requirement, it could be used in applications such as heterogeneous systems or modules without any communication feature like special image compression chips, some signal processors, application specific programmable logic or mass memory. The TSS901E may also be used in single board systems where standardised high speed interfaces are needed and systems containing "non-intelligent" modules such as A/D-converter or sensor interfaces which can be assembled with the TSS901E thanks to the "control by link" feature.
TSS901E Maximum Ratings
| Parameter | Symbol | Value | Unit |
| Supply Voltage | VCC | -0.5 to +7 | V |
| I/O Voltage | -0.5 to VCC + 0.5 | V | |
| Operating Temperature Range (Ambient) | TA | -55 to +125 | |
| Junction Temperature | TJ | TJ < TA +20 | |
| Storage Temperature Range | Tstg | -65 to +150 |
TSS901E Features
• 3 identical bidirectional link channels allowing full duplex communication under
selectable transmit rate from 1.25 up to 200 Mbit/s in each direction
• A COmmunication Memory Interface (COMI) provides autonomous accesses to a
communication memory which are controlled by an arbitration unit, allowing two
TSS901E to share one Dual Port Ram without external arbitration
• The scalable databus width (8/16/32 bit) allows flexible integration with any CPU type
• Little or big endian mode is configurable
• AHOst Control Interface (HOCI) gives read/write accesses to the TSS901E
configuration registers and to the DS-link channels for the controlling CPU
• Device control via one of the three links allows its use in systems without a local
controller
• Link disconnect detection and parity check at token (data and control) level; possible
checksum generation for packet level check
• Power saving mode relying on automatic transmit rate reduction
• Auser's manual of the TSS901E (also called SMCS332) is available at:
http://www.omimo.be/companies/dasa_000.htm
• Designed on Atmel MG1140E matrix and packaged into MQFPL196
selectable transmit rate from 1.25 up to 200 Mbit/s in each direction
• A COmmunication Memory Interface (COMI) provides autonomous accesses to a
communication memory which are controlled by an arbitration unit, allowing two
TSS901E to share one Dual Port Ram without external arbitration
• The scalable databus width (8/16/32 bit) allows flexible integration with any CPU type
• Little or big endian mode is configurable
• AHOst Control Interface (HOCI) gives read/write accesses to the TSS901E
configuration registers and to the DS-link channels for the controlling CPU
• Device control via one of the three links allows its use in systems without a local
controller
• Link disconnect detection and parity check at token (data and control) level; possible
checksum generation for packet level check
• Power saving mode relying on automatic transmit rate reduction
• Auser's manual of the TSS901E (also called SMCS332) is available at:
http://www.omimo.be/companies/dasa_000.htm
• Designed on Atmel MG1140E matrix and packaged into MQFPL196
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