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UDA1355H, UDA1360, UDA1360T

Table of contents:
Info of UDA1355H
Info of UDA1360
Info of UDA1360T

UDA1355H, UDA1360, UDA1360T Selling Leads, Datasheet

MFG:PHILIPS Package Cooled:TQFP44 D/C:5

UDA1355H, UDA1360, UDA1360T Datasheet download

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Part Number: UDA1355H

MFG: PHILIPS

Package Cooled: TQFP44

D/C: 5

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UDA1355H General Description

The UDA1355H is a single-chip IEC 60958 decoder and encoder with integrated stereo digital-to-analog converters and analog-to-digital converters employing bitstream conversion techniques.

The UDA1355H has a selectable one-of-four SPDIF input (accepting level I, II and III timing) and one SPDIF output which can generate level II output signals with CMOS levels. In microcontroller mode the UDA1355H offers a large variety of possibilities for defining signal flows through the IC, offering a flexible analog, digital and SPDIF converter chip with possibilities for off-chip sound processing via the digital input and output interface.

A lock indicator is available on pin LOCK when the IEC 60958 decoder and the clock regeneration mechanism is in lock. By default the DAC output and the digital data interface output are muted when the decoder is not in lock.

The UDA1355H contains two clock systems which can run at independent frequencies, allowing to lock-on to an incoming SPDIF or digital audio signal, and in the mean time generating a stable signal by means of the crystal oscillator for driving, for example, the ADC or SPDIF output signal.

Using the crystal oscillator (which requires a 12.288 MHz crystal) and the on-chip low jitter PLL, all standard audio sampling frequencies (f_s = 32, 44.1 and 48 kHz including half and double these frequencies) can be generated.

UDA1355H Connection Diagram

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