W83C553F-GBI, W83C554F, W83C55F-G Selling Leads, Datasheet
MFG:WINGBOND Package Cooled:QFP D/C:04+
W83C553F-GBI, W83C554F, W83C55F-G Datasheet download
Part Number: W83C553F-GBI
MFG: WINGBOND
Package Cooled: QFP
D/C: 04+
W83C553F-GBI, W83C554F, W83C55F-G
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Info of W83C553F-GBI
Info of W83C554F
Info of W83C55F-G
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About W83176G-732
PDF/DataSheet Download
Datasheet: W83176G-732
File Size: 411857 KB
Manufacturer: WINBOND [Winbond]
Download : Click here to Download
About W83C554F
PDF/DataSheet Download
Datasheet: W83C554F
File Size: 3619950 KB
Manufacturer: Winbond
Download : Click here to Download
About W83176G-732
PDF/DataSheet Download
Datasheet: W83176G-732
File Size: 411857 KB
Manufacturer: WINBOND [Winbond]
Download : Click here to Download
W83C554F General Description
The W83C554F Enhanced System I/O (SIO) Controller with PCI Arbiter is a highly integrated device intended for use in any Peripheral Component Interconnect (PCI) system, supporting x86 or PowerPC (non-x86) type microprocessors. It supports all PCI 2.1 compliant CPU bridge implementations and directly interfaces with PCI and ISA industry standard buses, including two direct drive IDE channels supporting up to four peripherals.
The W83C554F is a universal PCI device which can be used with many CPU-to-PCI bridge solution. The W83C554F includes 32-bit ISA DMA addressing (rather than 24-bit) to simplify its use in systems using re-compiled versions of 32-bit operating systems (such as Windows NT running on PowerPC, Alpha, or other RISC CPU).
The peripheral controller integrated into the W83C554F includes two enhanced seven channel 82C37A 32-bit DMA controllers that support fast DMA transfers with a four byte line buffer to isolate the PCI bus from the ISA bus, enhancing performance. Both DMA controllers support scatter/gather data transfer capability.
The W83C554F Enhanced SIO controller provides the bridge between the PCI bus and the ISA expansion bus. It also
integrates a PCI bus master IDE controller, an eight master PCI arbiter (which may be disabled if desired) and many of the common I/O functions found in today's ISA based PC systems. The W83C554F incorporates the logic for a complete PCI interface (master and slave) and ISA interface (master and slave). Also included is PCI and ISA arbitration, 14 level interrupt controller, a 16-bit BIOS timer, three programmable counter/timers, non-maskable-interrupt (NMI) control logic and register support for power management break events.
The built-in Enhanced PCI IDE Controller is a highly integrated dual port controller, providing a high performance data path between IDE devices and the PCI bus. Four IDE chip select signals provide accessing of up to four devices. Each device has its own programmable registers for selecting 16-bit and 32-bit data pipelined transfer rates, read-ahead and posted writes. A large 64 Byte DMA FIFO buffers data to and from the IDE disks enabling the integrated scatter/gather DMA controller to efficiently perform zero wait state burst transfers across the PCI bus when enough data is available in the FIFO. Bus master IDE significantly improves the overall system performance of a multi-master PCI configuration by greatly reducing the bus and CPU utilization required for the disk and CD-ROM interface. Burst data transfers at 33 MHz can be sustained at 132m MB/s on the PCI bus.
The integrated bus-mastering PCI-IDE core is the same as the W83C554F core with modification to support the new
UltraDMA/33 mode. Transfer speed on the IDE interface is up to 33MB/s. This controller is fully compliant to the SFF8038i specifications.
W83C554F Maximum Ratings
| Parameter |
Values |
Notes | |
|
Min |
Max | ||
| Storage Temperature |
-40°C |
125°C |
|
| Supply Voltage (Vdd) |
-0.5V |
7.0V |
|
| Input Voltage |
-0.5V |
Vdd +0.5V |
|
| Output Voltage |
-0.5V |
Vdd +0.5V |
|
W83C554F Features
High Integration PCI-ISA solution
• Optimized for lowest system cost
• Complies with PCI Revision 2.1 specification
• Universal PCI device supporting x86 and PowerPC (non-x86) modes of operation
Integrated PCI Bus Master IDE controller
• Dual channel Bus Master IDE for up to 4 peripherals, including hard drives, ATAPI (IDE) CD-ROMs, tapes, etc.
• Multi-threading capability allows two simultaneous I/O processes
• Independent IDE Timing registers allow fast/slow devices on the same cable
• Two independent DMA channels for Bus Master scatter/gather DMA transfers across the PCI bus
• Large 64 byte DMA FIFO for zero wait state PCI burst transfers
• Support for UltraDMA/33 Mode 0 (16MB/s), 1 (25MB/s) and 2 (33MB/s) IDE drives
• Support for multiword DMA Mode 1 (13.3 MB/s), Mode 2 (16.6 MB/s) IDE drives
• PIO IDE support for Modes 0-4 disks
• Four byte pre-fetch and posted write buffers
• DMA channels can be re-configured for P-n-P motherboard devices PCI Arbiter
• Supports CPU, IDE, ISA and five additional bus masters
• Programmable access windows allow fine tuning of PCI access for each bus master
• Can be disabled on power-up via strapped pin
Built-in Integrated Peripheral Controller (IPC) with standard PC-AT peripherals
• Two 82C37A DMA controllers (types A, B, and F)
- 32-bit addressing allows use of alternate CPUs, such as PowerPC
- support multiple 8-bit and 16-bit scatter/gather DMA channels
• Two 82C59A interrupt controllers
- all IRQ inputs may be programmed for edge or level sensitivity
• One 82C54 counter/timer
• Routes external PCI interrupts to a software-selectable interrupt channel PCI Bus Interface
• PCI Revision 2.1 compliant
• PCI clock frequencies up to 33 MHz at 5V
• Supports delayed completion for ISA cycles
• Active address decoding for internal I/O devices
• Subtractive decoding for ISA bridge, KBC and RTC
• Supports disconnection (with retry) for slow internal accesses to improve latency
• Short PCI bus ownership when mastering to minimize overall system latency
• Fast DMA transfers from I/O devices to PCI agents as a master
• Separate request and grant signals for ISA DMA and IDE controllers
ISA Bus Bridge
•
• Full implementation of a standard ISA bus
• Separate ISA and IDE data buses reduce noise and increase system performance
• Synchronous PCI-to-ISA interface with direct drive for 5 ISA slots XD-Bus interface
• Support for BIOS ROM or PowerPC systems boot ROM
• Support for flash EPROM
• Provide keyboard controller connections
• Provide real-time clock connections
• Provide data buffer control Miscellaneous
• Port B support
• Port 92 support
Power Management Break Event support for Green PC applications
NAND-tree on most signal pins to facilitate board level testing
Uses 0.5um, ultra-low power CMOS process technology
Packaged in 208-pin PQFP package
• Optimized for lowest system cost
• Complies with PCI Revision 2.1 specification
• Universal PCI device supporting x86 and PowerPC (non-x86) modes of operation
Integrated PCI Bus Master IDE controller
• Dual channel Bus Master IDE for up to 4 peripherals, including hard drives, ATAPI (IDE) CD-ROMs, tapes, etc.
• Multi-threading capability allows two simultaneous I/O processes
• Independent IDE Timing registers allow fast/slow devices on the same cable
• Two independent DMA channels for Bus Master scatter/gather DMA transfers across the PCI bus
• Large 64 byte DMA FIFO for zero wait state PCI burst transfers
• Support for UltraDMA/33 Mode 0 (16MB/s), 1 (25MB/s) and 2 (33MB/s) IDE drives
• Support for multiword DMA Mode 1 (13.3 MB/s), Mode 2 (16.6 MB/s) IDE drives
• PIO IDE support for Modes 0-4 disks
• Four byte pre-fetch and posted write buffers
• DMA channels can be re-configured for P-n-P motherboard devices PCI Arbiter
• Supports CPU, IDE, ISA and five additional bus masters
• Programmable access windows allow fine tuning of PCI access for each bus master
• Can be disabled on power-up via strapped pin
Built-in Integrated Peripheral Controller (IPC) with standard PC-AT peripherals
• Two 82C37A DMA controllers (types A, B, and F)
- 32-bit addressing allows use of alternate CPUs, such as PowerPC
- support multiple 8-bit and 16-bit scatter/gather DMA channels
• Two 82C59A interrupt controllers
- all IRQ inputs may be programmed for edge or level sensitivity
• One 82C54 counter/timer
• Routes external PCI interrupts to a software-selectable interrupt channel PCI Bus Interface
• PCI Revision 2.1 compliant
• PCI clock frequencies up to 33 MHz at 5V
• Supports delayed completion for ISA cycles
• Active address decoding for internal I/O devices
• Subtractive decoding for ISA bridge, KBC and RTC
• Supports disconnection (with retry) for slow internal accesses to improve latency
• Short PCI bus ownership when mastering to minimize overall system latency
• Fast DMA transfers from I/O devices to PCI agents as a master
• Separate request and grant signals for ISA DMA and IDE controllers
ISA Bus Bridge
•
• Full implementation of a standard ISA bus
• Separate ISA and IDE data buses reduce noise and increase system performance
• Synchronous PCI-to-ISA interface with direct drive for 5 ISA slots XD-Bus interface
• Support for BIOS ROM or PowerPC systems boot ROM
• Support for flash EPROM
• Provide keyboard controller connections
• Provide real-time clock connections
• Provide data buffer control Miscellaneous
• Port B support
• Port 92 support
Power Management Break Event support for Green PC applications
NAND-tree on most signal pins to facilitate board level testing
Uses 0.5um, ultra-low power CMOS process technology
Packaged in 208-pin PQFP package
W83C554F Connection Diagram
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