ACE9030, ACE9030 IW, ACE9030AIWFP20 Selling Leads, Datasheet
MFG:MITEL Package Cooled:TQFP D/C:99+
ACE9030, ACE9030 IW, ACE9030AIWFP20 Datasheet download
Part Number: ACE9030
MFG: MITEL
Package Cooled: TQFP
D/C: 99+
MFG:MITEL Package Cooled:TQFP D/C:99+
ACE9030, ACE9030 IW, ACE9030AIWFP20 Datasheet download
MFG: MITEL
Package Cooled: TQFP
D/C: 99+
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Datasheet: ACE9030
File Size: 389021 KB
Manufacturer: MITEL [Mitel Networks Corporation]
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PDF/DataSheet Download
Datasheet: ACE1001
File Size: 522684 KB
Manufacturer: FAIRCHILD [Fairchild Semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: ACE1001
File Size: 522684 KB
Manufacturer: FAIRCHILD [Fairchild Semiconductor]
Download : Click here to Download
ACE9030 is a combined radio interface circuit and twin synthesiser, intended for use in a cellular telephone.
The radio interface section contains circuits to monitor and control levels such as transmit power in the telephone, circuits to demodulate the frequency modulated signal to audio, and a crystal oscillator with a frequency multiplier.
The Main synthesiser has normal and fractional-N modes both with optional speed-up to select the desired channel. The Auxiliary synthesiser is used for the transmit-receive offset and for modulation.
Both sections are controlled by a serial bus and have software selected power saving modes for battery economy. The circuit techniques used have been chosen to minimise external components and at the same time give very high performance.
Supply voltage from ground ......... 0.3 V to + 6.0 V
(any VDD to any VSS)
Supply voltage difference ............. 0.3 V to + 0.3 V
(any VDD to any other VDD)
Input voltage ..................VSS 0.3 V to VDD + 0.3 V
(any input pin to its local VSS and VDD)
Output voltage ...............VSS 0.3 V to VDD + 0.3 V
(any output pin to its local VSS and VDD)
Storage temperature ............. 55 °C to + 150 °C
Operating temperature ............ 40 °C to + 85 °C
These are not the operating conditions, but are the absolute limits which if exceeded even momentarily may cause permanent damage. To ensure sustained correct operation the device should be used within the limits given under Electrical Characteristics.
To avoid any possibility of latch-up the substrate connec-tions VDDSUB and VDDSUB2 must be the most positive of all VDD's at all times including during power on and off ramping. As the current taken through these VDD's is significantly less than through the other VDD's this requirement can be easily met by directly connecting all VDD pins to a common point on the circuit board but with the decoupling capacitors distributed to minimise cross-talk caused by common mode currents. If low value series resistors are to be included in the VDD connections,with decoupling capacitors by the ACE9030 pins to further reduce interference, the VDDSUB and VDDSUB2 pins should not have such a resistor in order to guarantee that their voltage is not slowed down at power-on. Power switches to DOUT0 and DOUT1 are supplied from VDDX and are specified for a total current of up to 40 mA so any resistor in the VDDX connection must be very low, around 1W, in order to avoid excessive voltage drop; it is recommended that this supply
has no series resistor. These two methods are shown in circuit diagrams, figures 4 and 5. In both circuits the main VDD must also have good decoupling.