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CDCF2509PW, CDCF2509PWR, CDCF2510

Table of contents:
Info of CDCF2509PW
Info of CDCF2509PWR
Info of CDCF2510

CDCF2509PW, CDCF2509PWR, CDCF2510 Selling Leads, Datasheet

MFG:Texas Instruments Category:Integrated Circuits (ICs) Package Cooled:TSSOP D/C:04+

CDCF2509PW, CDCF2509PWR, CDCF2510 Datasheet download

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Part Number: CDCF2509PW

Category: Integrated Circuits (ICs)

MFG: Texas Instruments

Package Cooled: TSSOP

D/C: 04+

Description: IC 3.3V PLL CLOCK-DRVR 24-TSSOP

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CDCF2509PW Parameters

Technical/Catalog Information	CDCF2509PW
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Type	PLL Clock Driver
Voltage - Supply	3 V ~ 3.6 V
Number of Outputs	9
Input	LVTTL
Output	LVTTL
Frequency-Max	140MHz
Package / Case	24-TSSOP
Packaging	Tube
Operating Temperature	0°C ~ 85°C
Drawing Number	296; 4040064; PW; 8, 14, 16, 20, 24, 28
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	CDCF2509PW CDCF2509PW 296 15356 5 ND 296153565ND 296-15356-5

CDCF2509PW General Description

3.3-V Phase-Lock Loop Clock Driver

CDCF2509PW Features

Use CDCVF2510A as a Replacement for this Device
Designed to Meet PC133 SDRAM Registered DIMM Specification Rev. 0.9
Spread Spectrum Clock Compatible
Operating Frequency 25 MHz to 140 MHz
Static Phase Error Distribution at 66 MHz to 133 MHz is ±125 ps
Jitter (cyc-cyc) at 66 MHz to 133 MHz Is |70| ps
Available in Plastic 24-Pin TSSOP
Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications
Distributes One Clock Input to One Bank of Ten Outputs
Output Enable Pin to Enable/Disable All 10 Outputs
External Feedback (FBIN) Terminal Is Used to Synchronize the Outputs to the Clock Input
On-Chip Series Damping Resistors
No External RC Network Required
Operates at 3.3 V

CDCF2509PW Typical Application

CDCF2510 Datasheet

CDCF2509PWR Parameters

Technical/Catalog Information	CDCF2509PWR
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Type	PLL Clock Driver
Voltage - Supply	3 V ~ 3.6 V
Number of Outputs	9
Input	LVTTL
Output	LVTTL
Frequency-Max	140MHz
Package / Case	24-TSSOP
Packaging	Tape & Reel (TR)
Operating Temperature	0°C ~ 85°C
Drawing Number	296; 4040064; PW; 8, 14, 16, 20, 24, 28
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	CDCF2509PWR CDCF2509PWR

CDCF2510 Parameters

CDCF2510 Features

Use CDCVF2510A as a Replacement for this Device
Designed to Meet PC133 SDRAM Registered DIMM Specification Rev. 0.9
Spread Spectrum Clock Compatible
Operating Frequency 25 MHz to 140 MHz
Static Phase Error Distribution at 66 MHz to 133 MHz is ±125 ps
Jitter (cyc-cyc) at 66 MHz to 133 MHz Is |70| ps
Available in Plastic 24-Pin TSSOP
Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications
Distributes One Clock Input to One Bank of Ten Outputs
Output Enable Pin to Enable/Disable All 10 Outputs
External Feedback (FBIN) Terminal Is Used to Synchronize the Outputs to the Clock Input
On-Chip Series Damping Resistors
No External RC Network Required
Operates at 3.3 V

CDCF2510 General Description

3.3-V Phase-Lock Loop Clock Driver

CDCF2510 Features

Use CDCVF2510A as a Replacement for this Device
Designed to Meet PC133 SDRAM Registered DIMM Specification Rev. 0.9
Spread Spectrum Clock Compatible
Operating Frequency 25 MHz to 140 MHz
Static Phase Error Distribution at 66 MHz to 133 MHz is ±125 ps
Jitter (cyc-cyc) at 66 MHz to 133 MHz Is |70| ps
Available in Plastic 24-Pin TSSOP
Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications
Distributes One Clock Input to One Bank of Ten Outputs
Output Enable Pin to Enable/Disable All 10 Outputs
External Feedback (FBIN) Terminal Is Used to Synchronize the Outputs to the Clock Input
On-Chip Series Damping Resistors
No External RC Network Required
Operates at 3.3 V

CDCF2510 Typical Application

CDCF2510 Datasheet

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