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CDCL6010RGZTG4, CDCLVD110, CDCLVD110AVF

Table of contents:
Info of CDCL6010RGZTG4
Info of CDCLVD110
Info of CDCLVD110AVF

CDCL6010RGZTG4, CDCLVD110, CDCLVD110AVF Selling Leads, Datasheet

MFG:Texas Instruments Category:Integrated Circuits (ICs) Package Cooled:QFN D/C:0710+

CDCL6010RGZTG4, CDCLVD110, CDCLVD110AVF Datasheet download

Five Points

Part Number: CDCLVD110AVF

Category: Integrated Circuits (ICs)

MFG: Texas Instruments

Package Cooled: QFN

D/C: 0710+

Description: IC LVDS CLK DVR 1:10 PROG 32LQFP

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CDCL6010RGZTG4 Parameters

Technical/Catalog Information	CDCL6010RGZTG4
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Type	Clock Synchronizer
Voltage - Supply	1.7 V ~ 1.9 V
Number of Outputs	11
Input	LVDS
Output	CML
Frequency-Max	1.25GHz
Package / Case	48-QFN
Packaging	Tape & Reel (TR)
Operating Temperature	-40°C ~ 85°C
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	CDCL6010RGZTG4 CDCL6010RGZTG4

CDCLVD110 Parameters

CDCLVD110 Features

Low-Output Skew <30 ps (Typical) for Clock-Distribution applications
Distributes One Differential Clock Input to 10 LVDS Differential Clock Outputs
V_CC range 2.5 V ±5%
Typical Signaling Rate Capability of Up to 1.1 GHz
Configurable Register (SI/CK) Individually Enables Disables Outputs, Selectable CLK0, CLK0\ or CLK1, CLK1\ Inputs
Full Rail-to-Rail Common-Mode Input Range
Receiver Input Threshold ±100 mV
Available in 32-Pin TQFP Package
Fail-Safe I/O-Pins for V_DD = 0 V (Power Down)

CDCLVD110 General Description

1-to-10 LVDS clock buffer up to 900MHz with minimum skew for clock distribution

CDCLVD110 Features

Low-Output Skew <30 ps (Typical) for Clock-Distribution applications
Distributes One Differential Clock Input to 10 LVDS Differential Clock Outputs
V_CC range 2.5 V ±5%
Typical Signaling Rate Capability of Up to 1.1 GHz
Configurable Register (SI/CK) Individually Enables Disables Outputs, Selectable CLK0, CLK0\ or CLK1, CLK1\ Inputs
Full Rail-to-Rail Common-Mode Input Range
Receiver Input Threshold ±100 mV
Available in 32-Pin TQFP Package
Fail-Safe I/O-Pins for V_DD = 0 V (Power Down)

CDCLVD110 Typical Application

CDCLVD110 Datasheet

CDCLVD110AVF Parameters

Technical/Catalog Information	CDCLVD110AVF
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Type	Clock Driver
Voltage - Supply	2.375 V ~ 2.625 V
Number of Outputs	10
Input	LVDS
Output	LVDS
Frequency-Max	1.1GHz
Package / Case	32-LQFP
Packaging	Tray
Operating Temperature	-40°C ~ 85°C
Drawing Number	296; 4040172; VF; 32
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	CDCLVD110AVF CDCLVD110AVF 296 21573 ND 29621573ND 296-21573

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