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LC8750C64B-57E1-E, LC875148A, LC875164A-5V90

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MFG:SANYO  Package Cooled:05+  D/C:QFP

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LC8750C64B-57E1-E, LC875148A, LC875164A-5V90 Datasheet download

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Part Number: LC8750C64B-57E1-E

 

MFG: SANYO

Package Cooled: 05+

D/C: QFP

 

 

 
 
 
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About LC8.0

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Datasheet: LC8.0

File Size: 600987 KB

Manufacturer: MICROSEMI [Microsemi Corporation]

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  • Vendor: SANYO Pack: QFP Qty: 80 Note: stock,TEL:86-0755-61329226,MSN:havinzhou@hotmail.com  Adddate: 2024-04-30
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  • LC81192

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  • LC81192-6083-TLM

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About LC875148A

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Datasheet: LC875148A

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Manufacturer: Sanyo

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    Tel: 86-021-61327535
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  • Pack: SOP D/C: 08+& Qty: 1000 Note: NEW  Adddate: 2024-04-30
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About LC8.0

PDF/DataSheet Download

Datasheet: LC8.0

File Size: 600987 KB

Manufacturer: MICROSEMI [Microsemi Corporation]

Download : Click here to Download

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LC875148A General Description

The LC875164A/48A/32A microcontroller is 8-bit single chip microcontroller with the following on-chip functional blocks:

   - CPU: Operable at a minimum bus cycle time of 100ns
   - 64K/48K/32K bytes ROM
   - 1024 byte RAM
   - two high performance 16 bit timer/counters (can be divided into 8 bit units)
   - two 8 bit timers with prescalers
   - timer for use as date/time clock
   - two synchronous serial I/O ports (with automatic block transmit/receive function)
   - one asynchronous/synchronous serial I/O port
   - 12-bit PWM × 2
   - 8-channel × 8-bit AD converter
   - high speed 8-bit parallel interface
   - 19-source 10-vectored interrupt system

All of the above functions are fabricated on a single chip.

LC875148A Maximum Ratings

Parameter Symbol Pins Conditions  
Ratings
unit
VDD[V]
min.
typ
max.
Maximum
supply voltage
VDD max VDD1,VDD2,VDD3 VDD1=VDD2=VDD3  
-0.3
+7.0
V
Input voltage VI(1) XT1, XT2, CF1    
-0.3
VDD+0.3
output voltage VO(1) PWM0, PWM1    
-0.3
VDD+0.3
Input/output
voltage
VIO(1) Ports 0, 1, 2
Ports 3, 7, 8
Ports A, B, C
SI2P00-SI2P03
PWM0, PWM1
   
-0.3
VDD+0.3
High
level
output
current
Peak
output
current
IOPH(1) Ports 0, 1, 2, 3
Ports A, B, C
SI2P00-SI2P03
PWM0, PWM1
•CMOS output
•For each pin.
 
-10
mA
IOPH(2) P71-P73 For each pin.  
-5
Total
output
current
IOAH(1) P71-P73    
-5
IOAH(2) Port 1
PWM0, PWM1
Port 3
SI2P00-SI2P03
The total of all pins.  
-30
IOAH(3) Ports 0, 2 The total of all pins.  
-20
IOAH(4) Ports B    
-20
IOAH(5) Ports A, C The total of all pins.  
-20
Low
level
output
current
Peak
output
curren
IOPL(1) P02-P07
Ports 1, 2, 3
Ports A, B, C
SI2P00-SI2P03
PWM0, PWM1
For each pin.  
20
IOPL(2) P00, P01 For each pin.  
30
IOPL(3) Ports 7, 8 For each pin.  
5
Total
output
current
IOAL(1) Ports 7 The total of all pins  
15
IOAL(2) Ports 8 The total of all pins  
15
IOAL(3) Port 1
PWM0, PWM1
Port 3
SI2P00-SI2P03
The total of all pins  
50
IOAL(4) Ports 0, 2 The total of all pins.  
70
IOAL(5) Ports B The total of all pins  
40
IOAL(6) Ports A,C The total of all pins  
40
Maximum power
dissipation
Pdmax QIP80E
SQFP80
Ta=-30 to+70°C  
350
mW
Operating
temperature
range
Topr      
-30
70
Storage
temperature
range
Tstg      
-55
125

LC875148A Features

` Read Only Memory
   - 65536 * 8 bits (LC875164A)
   - 49151 * 8 bits (LC875148A)
   - 32512 * 8 bits (LC875132A)
` Bus Cycle Time
   - 100ns (10MHz)
      Note: The bus cycle time indicates ROM read time.
` Minimum Instruction Cycle Time : 300ns (10MHz)
` Ports
   - Input/output ports
     Each bit data direction programmable 59 (P1n,P2n,P3n,P70 to P73,P8n,PAn,PBn,PCn,S2Pn)
     Nibble data direction programmable 8 (P0n)
   - Input ports 2 (XT1,XT2)
   - PWM Output ports 2 (PWM0,PWM1)
   - Oscillator pins 2 (CF1,CF2)
   - Reset pin 1 ( RES )
   - Power supply 6 (VSS1 to 3,VDD1 to 3)
` Timers
   - Timer0: 16 bit timer/counter with capture register
     Mode 0: 2 channel 8 bit timer with programmable 8 bit prescaler and 8 bit capture register
     Mode 1: 8 bit timer with 8 bit programmable prescaler and 8 bit capture register + 8 bit counter with 8 bit capture register
     Mode 2: 16 bit timer with 8 bit programmable prescaler and 16 bit capture register
     Mode 3: 16 bit counter with 16 bit capture register
   - Timer1: PWM/16 bit timer/counter (with toggle output)
     Mode 0: 8 bit timer (with toggle output) + 8 bit timer counter (with toggle output)
     Mode 1: 2 channel 8 bit PWM
     Mode 2: 16 bit timer/counter (with toggle output)
     Mode 3: 16 bit timer (with toggle output) Lower order 8 bits can be used as PWM output.
   - Timer4: 8-bit timer with 6-bit prescaler
   - Timer5: 8-bit timer with 6-bit prescaler
   - Base timer
     1. The clock signal can be selected from any of the following: sub-clock (32.768kHz crystal oscillator), system clock, and prescaler output for timer 0.
     2. Interrupts can be selected to occur at one of five different times.
`SIO
   - SIO0: 8 bit synchronous serial interface
     1. LSB first/MSB first function available
     2. Internal 8-bit baud-rate generator (maximum transmit clock period 4/3 TCYC)
     3. Continuous automatic data communications (1 - 256 bits)
   - SIO1: 8 bit asynchronous/synchronous serial interface
     Mode 0: Synchronous 8 bit serial IO (2-wire or 3-wire, transmit clock 2 - 512 TCYC)
     Mode 1: Asynchronous serial IO (half duplex, 8 data bits, 1 stop bit, baud rate 8 - 2048 TCYC)
     Mode 2: Bus mode 1 (start bit, 8 data bits, transmit clock 2 - 512 TCYC)
     Mode 3: Bus mode 2 (start detection, 8 data bits, stop detection)
   - SIO2: 8 bit synchronous serial interface
     1. LSB-first
     2. Built in 8-bit baud-rate generator (Maximum clock period 4/3 TCYC)
     3. Continuous automatic data communication (1 - 32 bytes)
` AD converter
   - 8-bits * 8-channels
` PWM
   - 2 channel synchronous variable 12 bit PWM
` Parallel interface
   - RS, RD , WR CS0CS2 Outputs (reversible polarity)
   - read/write possible in 1 TCYC
` Remote control receiver circuit (connected to P73/INT3/T0IN terminal)
   - Noise rejection function (noise rejection filter time constant can selected from 1/32/128 TCYC)
` Watchdog timer
   - The watchdog timer period set by external RC.
   - Watchdog timer can be set to produce interrupt, system reset
`Interrupts
   - 19-source, 10-vectored interrupts:
    1. Three level (low, high and highest) multiple interrupts are supported. During interrupt handling, an equal or lower level interrupt request is refused.
    2. If interrupt requests to two or more vector addresses occur at once, the higher level interrupt takes precedence.
        In the case of equal priority levels, the vector with the lowest address takes precedence.
     • Priority Level : X > H > L
     • For equal priority levels, vector with lowest address takes precedence.
` Subroutine stack levels
   - 512 levels max. Stack is located in RAM
` Multiplication and division
   - 16 bit * 8 bit (executed in 5 cycles)
   - 24 bit * 16 bit (12 cycles )
   - 16 bit ÷ 8 bit (8 cycles)
   - 24 bit ÷ 16 bit (12 cycles)
` Oscillation circuits
   - On-chip RC oscillation circuit used for system clock
   - On-chip CF oscillation circuit used for system clock
   - On-chip Crystal oscillation circuit used for system clock and time-base clock
` Standby function
   - HALT mode
     HALT mode is used to reduce power consumption. Program execution is stopped. Peripheral circuits still operate.
     1. Oscillation circuits are not stopped automatically
     2. Release on system reset
   - HOLD mode
     HOLD mode is used to reduce the power dissipation. Both program execution and peripheral circuits are stopped.
     1. CF, RC and crystal oscillation circuits stop automatically
     2. Release occurs on any of the following conditions
         •input to the reset pin goes low
         •a specified level is input to at least one of INT0, INT1, INT2, INT4, INT5
         •an interrupt condition arises at port 0
   - X'tal HOLD mode
     X'tal HOLD mode is used to reduce power consumption. Program execution is stopped. All peripheral circuits except the base timer are stopped.
     1. CF and RC oscillation circuits stop automatically
     2. Crystal oscillator is maintained in its state at HOLD mode inception.
     3. Release occurs on any of the following conditions
         •input to the reset pin goes low
         •a specified level is input to at least one of INT0, INT1, INT2, INT4, INT5
         •an interrupt condition arises at port 0
         •an interrupt condition arises at the base-timer
` Factory shipment
   - delivery form QIP80E
   - delivery form SQFP80
`Development Tools
   - Evaluation chip : LC876099
   - Emulator : EVA87000 + ECB875100 (Evaluation chip board) + POD875100 (POD)

LC875148A Connection Diagram

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