M66305AP, M66307, M66307FP Selling Leads, Datasheet
MFG:NEW Package Cooled:DIP D/C:06+
M66305AP, M66307, M66307FP Datasheet download
Part Number: M66305AP
MFG: NEW
Package Cooled: DIP
D/C: 06+
MFG:NEW Package Cooled:DIP D/C:06+
M66305AP, M66307, M66307FP Datasheet download
MFG: NEW
Package Cooled: DIP
D/C: 06+
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Datasheet: M66305AP
File Size: 89097 KB
Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: M66307FP
File Size: 239090 KB
Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: M66307FP
File Size: 239090 KB
Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]
Download : Click here to Download
M66305A Toggle Line Buffer has two 5,120-bit line buffer memories. It takes in serial data that arrives synchronously
with clock pulses and outputs it in serial at a rate of up to 10 Mbits per second synchronously with external clock pulses.
This buffer employs the double buffer system: While data is being output, data on the next line can be written on the other line buffer memory.
Symbol |
Parameter |
Conditions |
Ratings |
Unit |
Vcc | Supply voltage |
-0.5to +7.0 |
V | |
VI | Input voltage |
-0.5 to VCC+0.5 |
V | |
Vo | Output voltage |
-0.5 to VCC+0.5 |
V | |
Pd | Power dissipation |
mounted |
700 |
mW |
Tstg | Storage temperature |
-65 to +150 |
°C |
• 5,120 × 1bit serial input-serial output line buffer memories
• Data transmission at 10 megabits/second maximum
• Two line buffer memories can be alternated by external toggle signal.
• Memory capacity can be doubled by cascade connection.
• Because of cascade input pin (CAS1), output potential after completion of output can be set to either H or L.
• Low noise and high fan-out output (IO = ±24mA guaranteed)
• Every input pin has built-in Schmidt trigger circuit.
• Read counter and write counter can be reset independently.
• RESET, T, CNTRST1and CNTRST2are equipped with negative noise reduction circuit.
The M66307SP/FP is an integrated circuit consisting of a line buffer with static memory, manufactured by the silicon gate CMOS process,which satisfies A3-paper 400DPI requirements. It converts the stored data from the 16-bit MPU bus into serial data and outputs it at a transfer rate of up to 10Mbps synchronously with the external data request clock or an arbitrary continuous clock.
Symbol |
Parameter |
Condition |
Rating |
Unit |
Vcc | Supply voltage |
0.3to+7.0 |
V | |
VI | Input voltage |
-0.3toVcc+0.3 |
V | |
Vo | Output voltage |
0toVcc |
V | |
Pd | Power dissipation | Ta=25°C |
700 |
mW |
Tstg | Storage temperature |
-65to+150 |
°C |
• 16-bit MPU bus compatible
• Writing data via DMAC is possible
• 320-word (5,120-bit) static RAM
• Data output rate of up to 10Mbps
• Built-in function to add fixed data of a specified length at the beginning of output data (Fixed data: Continuous High bit or Low bit data)
• The output format can be selected between FIFO or LIFO.
• The output method can be selected from two:
(1) Synchronized with an arbitrary continuous clock (IN) on the system side; the frequency of clock output (CLK/OUT) can be divided by 1, 2, 4, 8, or 16.
(2) Synchronized with the data request clock (CLK IN) on the peripheral equipment side.
• Up to two devices can be cascaded.
(1) Toggle configuration
(2) 32-bit bus configuration
• High fan-out outputs (CLK/OUT, DATA OUT).
Io=±24mA
(±4mA for INTR and DREQ
±8mA for BUSY/ORDY)