PM7343PI, PM7343-PI, PM7344 Selling Leads, Datasheet
MFG:BGA Package Cooled:PMC D/C:05+
PM7343PI, PM7343-PI, PM7344 Datasheet download

Part Number: PM7343PI
MFG: BGA
Package Cooled: PMC
D/C: 05+
MFG:BGA Package Cooled:PMC D/C:05+
PM7343PI, PM7343-PI, PM7344 Datasheet download

MFG: BGA
Package Cooled: PMC
D/C: 05+
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Datasheet: PM701
File Size: 263426 KB
Manufacturer:
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PDF/DataSheet Download
Datasheet: PM701
File Size: 263426 KB
Manufacturer:
Download : Click here to Download
PDF/DataSheet Download
Datasheet: PM7344
File Size: 1175108 KB
Manufacturer: PMC [PMC-Sierra, Inc]
Download : Click here to Download
The PM7344 SATURN Quad T1/E1 Multi-PHY User Network Interface (S/UNIMPH) s a monolithic integrated circuit that implements the T1/E1 processing and TM mapping functions for four 1.544 Mbit/s or 2.048 Mbit/s ATM User Network nterfaces. It can also be used in conjunction with external framing devices, to mplement ATM user network interfaces for other bit rates. For example, a quad 2 (6.312 Mbit/s) interface can be realized with four external J2 framers and a ingle S/UNI-MPH. It is fully compliant with both ANSI and ITU requirements and TM Forum UNI specifications. The S/UNI-MPH is software configurable, llowing feature selection without changes to external wiring.
On the receive side, when configured for T1 processing, the S/UNI-MPH ecovers clock and data and can be configured to frame to either of the common S-1 signal formats; SF or ESF. Clock recovery may also be bypassed. The /UNI-MPH also supports detection of various alarm conditions such as loss of ignal, pulse density violation, red alarm, yellow alarm, and AIS alarm. The /UNI-MPH detects and indicates the presence of yellow and AIS patterns and lso integrates yellow, red, and AIS alarms as per industry specifications.
Performance monitoring with accumulation of CRC-6 errors, framing bit errors, ine code violations, and loss of frame events is provided. The S/UNI-MPH also etects the presence of in-band loopback codes, ESF bit oriented codes, and etects and terminates HDLC messages on the ESF data link.
On the receive side, when configured for E1 processing, the S/UNI-MPH ecovers clock and data and can be configured to frame to a basic G.704 2048 bit/s signal or also frame to the signalling multiframe alignment signal and the RC multiframe alignment signal. Clock recovery may also be bypassed.
The S/UNI-MPH also supports detection of various alarm conditions such as loss f signal, loss of frame, loss of signalling multiframe, loss of CRC multiframe, nd reception of remote alarm signal, remote multiframe alarm signal, alarm ndication signal, and timeslot 16 alarm indication signal. The S/UNI-MPH etects and indicates the presence of remote alarm and AIS patterns and also ntegrates red and AIS alarms as per industry specifications.
Performance monitoring with accumulation of CRC-4 errors, far end block errors, raming bit errors, and line code violation is provided. The S/UNI-MPH also detects and terminates HDLC messages on a data link. The data link ma
• Single chip quad ATM User Network Interface operating at 1.544 Mbit/s or 2.048 Mbit/s.
• Implements the ATM Forum User Network Interface Specification V3.1 for DS1 and E1 transmission rates.
• Implements the ATM physical layer for Broadband ISDN according to ITU-T Recommendation I.432.
• Implements the direct cell mapping into DS1 or E1 transmission systems according to ITU-T Recommendation G.804.
• Implements (with an external framer device) the direct cell mapping into J2 (6.312 Mbit/s) transmission systems according to ITU-T Recommendation G.804.
• Integrates a quad full-featured T1/E1 framer/transmitter for terminating four duplex 1.544 Mbit/s DS-1 signals or four duplex 2.048 Mbit/s E1 signals.
• Integrates a quad ATM cell processor for mapping ATM cells into T1, E1 and other arbitrary rate streams using HEC (Header Check Sequence Error Correction) cell delineation.
• Provides Saturn Compatible Interface (SCI-PHYTM) FIFO buffers in both transmit and receive paths with parity support and Utopia Level 2 compatible multi-PHY control signals.
• Software compatible with the PM4341A T1XC, PM6341 E1XC, and PM7345 S/UNI-PDH.
• Provides a standard 5 signal P1149.1 JTAG test port for boundary scan board test purposes.
• Provides a generic 8-bit microprocessor bus interface for configuration, control, and status monitoring.
• Low power, +5V, CMOS technology
• 128 pin rectangular (14mm x 20mm) PQFP package.
• ATM Switches Supporting DS1 or E1 UNI Ports
• ATM Switches Supporting DS3 Ports Carrying Multiplexed DS1 or E1 UNI ignals
• ATM Switches Supporting STS-3/STM-1 Or Other SONET/SDH Ports arrying Tributary Mapped DS1 or E1 UNI Signals
• ATM Customer Premise Equipment Supporting Multiple DS1 or E1 UNI Ports
