PM73123

• Supports eight structured/unstructured
T1, E1 links or one unstructured DS3,
E3 or STS-1/STM-0 link over an AAL1
CBR ATM network.
• Compliant with ATM Forum's CES (AFVTOA-
0078), and ITU-T I.363.1.
• Supports up to 256 VCs.
• Supports n x 64 (consecutive hannels) and m x 64 (nonconsecutive hannels) structured data ormat with channel associated ignaling (CAS) support.
• Internal E1/T1 clock synthesizers rovided for each line which can be ontrolled via internal synchronous esidual time stamp (SRTS) or an nternal programmable weighted  oving average adaptive clocking lgorithm in unstructured mode. Clock ynthesizers can also be controlled xternally to provide customization of RTS or adaptive clocking methods.
• Provides transparent transmission of CS and CAS and termination of CAS ignaling.
• Compliant with ATM Forum's Dynamic andwidth Circuit Emulation Service(DBCES) AF-VTOA-0085. Supports dle channel detection via processor ntervention, CAS signaling, or data attern detection. Provides idle hannel indication on a per channel asis.
• Supports AAL0 mode, selectable on a er VC basis.
• Provides transmit and receive buffers hich can be used for OAM cells as ell as any other user-generated cells uch as AAL5 cells for ATM signaling.