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The SPP2301 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density,DMOS trench technology.
This high density process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management and other battery powered circuits,and low in-line power loss are needed in a very small outline surface mount package.
SPP2301 Maximum Ratings
Parameter
Symbol
Typical
Unit
Drain-Source Voltage
VDSS
-20
V
Gate Source Voltage
VGSS
±12
V
Continuous Drain Current(TJ=150)
TA=25
ID
-2.5
A
TA=70
-1.5
Pulsed Drain Current
IDM
-10
A
Continuous Source Current(Diode Conduction)
IS
-1.6
A
Power Dissipation
TA=25
PD
1.25
W
TA=70
0.8
Operating Junction Temperature
TJ
150
Storage Temperature Range
TSTG
-55/150
Thermal Resistance-Junction to Ambient
RJA
120
/W
SPP2301 Features
-20V/-2.8A,RDS(ON)=120mΩ@VGS=-4.5V -20V/-2.0A,RDS(ON)=170mΩ@VGS=-2.5V Super high density cell design for extremely low RDS (ON) Exceptional on-resistance and maximum DC current capability SOT-23-3L package design
SPP2301 Typical Application
Power Management in Note book Portable Equipment Battery Powered System DC/DC Converter Load Switch DSC LCD Display inverter