TC9203JR, TC9203P, TC9204M Selling Leads, Datasheet
MFG:dancall Package Cooled:dancall D/C:dc97
TC9203JR, TC9203P, TC9204M Datasheet download
Part Number: TC9203JR
MFG: dancall
Package Cooled: dancall
D/C: dc97
TC9203JR, TC9203P, TC9204M
- Table of contents:
Info of TC9203JR
Info of TC9203P
Info of TC9204M
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About TC901
PDF/DataSheet Download
Datasheet: TC901
File Size: 52216 KB
Manufacturer: MICROCHIP [Microchip Technology]
Download : Click here to Download
About TC9203P
PDF/DataSheet Download
Datasheet: TC9203P
File Size: 521539 KB
Manufacturer: TOSHIBA [Toshiba Semiconductor]
Download : Click here to Download
About TC9204M
PDF/DataSheet Download
Datasheet: TC9204M
File Size: 1580136 KB
Manufacturer: ETC [ETC]
Download : Click here to Download
TC9204M General Description
TC9204M is a fully integrated 4-Port 10/100/1000 smart Ethernet switch controller designed for low cost and high performance solutions. The chip embeds necessary SSRAM for packet buffering and MAC address table. It provides MII / GMII interface for all ports.
A store-and-forward switching method using anon-blocking architecture is implemented within TC9204M to improve the availability and bandwidth. The chip embeds SSRAM packet buffer, which it supports normal and priority queues for each transmission port. TC9204M provides evolved CoS with four levels of priority. The priority can be checked via layer 2 (802.1Q VLAN Tagging) and/or layer 3 (IP Header TOS bits) packets. Port based priority is also provided to ensure transmission with precedence for all packets incoming from selected port(s).
TC9204M Features
Stand Alone Switch On A Chip
4 Ethernet 10/100/1000 ports
MII/GMII interface for all ports
Four Classes of Service (CoS) selectable
each port and/or checked via IP Header and
802.1Q VLAN Tag
Support 4 port-based VLANs
Maximum throughput (wire speed), non
head-of-line blocking architecture
Embedded SSRAM for packet buffer
address table, no external memory required
8K MAC address table
25 MHz crystal input only
Each port is configurable to 10 full/half duplex,
100 full/half duplex and 1000 full duplex mode
Flow-control ability is able to set for both
and half duplex mode
Broadcast throttling
Port Mirroring
Serial EEPROM Interface, EEPROM is optional
MDIO master for PHY configuration / polling
0.18 micron technology
2.0V and 3.3V dual voltage power supply
Packaged in PQFP 208
4 Ethernet 10/100/1000 ports
MII/GMII interface for all ports
Four Classes of Service (CoS) selectable
each port and/or checked via IP Header and
802.1Q VLAN Tag
Support 4 port-based VLANs
Maximum throughput (wire speed), non
head-of-line blocking architecture
Embedded SSRAM for packet buffer
address table, no external memory required
8K MAC address table
25 MHz crystal input only
Each port is configurable to 10 full/half duplex,
100 full/half duplex and 1000 full duplex mode
Flow-control ability is able to set for both
and half duplex mode
Broadcast throttling
Port Mirroring
Serial EEPROM Interface, EEPROM is optional
MDIO master for PHY configuration / polling
0.18 micron technology
2.0V and 3.3V dual voltage power supply
Packaged in PQFP 208
TC9204M Connection Diagram
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