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TLE6259-2, TLE6259-2G, TLE62604P

Table of contents:
Info of TLE6259-2
Info of TLE6259-2G
Info of TLE62604P

TLE6259-2, TLE6259-2G, TLE62604P Selling Leads, Datasheet

MFG:Infineon Package Cooled:SOP8 D/C:99+

TLE6259-2, TLE6259-2G, TLE62604P Picture

TLE6259-2, TLE6259-2G, TLE62604P Datasheet download

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Part Number: TLE6259-2

MFG: Infineon

Package Cooled: SOP8

D/C: 99+

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TLE6259-2 General Description

The TLE6259-2G belongs to TLE 6259-2. The TLE 6259-2 is a monolithic integrated circuit in a P-DSO-8-3 package. It works as an interface between the protocol controller and the physical bus. The TLE 6259-2 is especially suitable to drive the bus line in LIN systems in automotive and industrial applications. Further it can be used in standard ISO9141 systems. The TLE6259-2 has a BUS short to GND feature implemented, to avoid a battery decharge. In order to reduce the current consumption, the TLE 6259-2 offers a sleep operation mode. In this mode a voltage regulator can be controlled to minimize the current consumption of the whole application. A wake-up caused by a message on the bus, enables the voltage regulator and sets the RxD output LOW until the device is switched to normal operation mode. The IC is based on the Smart Power Technology SPT® which allows bipolar and CMOS control circuitry in accordance with DMOS power devices existing on the same monolithic circuit. The TLE 6259-2 is designed to withstand the severe conditions of automotive applications.

The features of TLE6259-2G are (1) single-wire transceiver; (2) suitable for LIN protocol; (3) compatible to LIN specification; (4) compatible to ISO 9141 functions; (5) transmission rate up to 20 kBaud; (6) very low current consumption in sleep mode; (7) short circuit proof to ground and battery; (8) overtemperature protection; (9) control output for voltage regulator; (10) bus short to GND protection.

The absolute maximum ratings of TLE6259-2G are supply voltage(VCC): -0.3 to 6 V; (2)bus input voltage(Vbus): -20 to 32 V; (3)bus input voltage(Vbus ): -20 to 40 V(@ t < 1 s); (4) battery supply voltage (VS): -0.3 to 40 V; (5)logic voltages at EN, TxD, RxD(VI): -0.3 to VCC + 0.3V( 0 V < VCC < 5.5V); (6)electrostatic discharge voltage at Vs, bus(VESD): -4 to 4 kV( human body model (100 pF via 1.5 kΩ)); (7)electrostatic discharge voltage(VESD): -2 to 2 kV(human body model (100 pF via 1.5 kΩ)); (8)junction temperature (Tj): -40 to 150 °C; (9)input voltages at INH(VINH): -0.3 to VS + 0.3V; (10)output current at INH(IINH): 20 mA.(Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit.). For fail safe reasons, the TLE6259-2 already has a pull up resistor of 30k implemented. To achieve the required timings for the dominant to recessive transition of the bus signal an additional external termination resistor of 1kΩ is required. It is recommended to place this resistor in the master node. To avoid reverse currents from the bus line into the battery supply line in case of an unpowered node, it is recommended to place a diode in series to the external pull up. For small systems (low bus capacitance) the EMC performance of the system is supported by an additional capacitor of at least 1nF in the master node (see figure 6 and 7, application circuit).

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