MFG:Texas Instruments Category:Integrated Circuits (ICs) Package Cooled:QFP D/C:02+
TLK3104, TLK3104SCGNT, TLK3114J0 Datasheet download
Category: Integrated Circuits (ICs)
MFG: Texas Instruments
Package Cooled: QFP
D/C: 02+
Description: IC BKPLANE TXRX QUAD SER 289-BGA
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Datasheet: TLK3104SA
File Size: 561328 KB
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Datasheet: TLK1002A
File Size: 402791 KB
Manufacturer: TI
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PDF/DataSheet Download
Datasheet: TLK1002A
File Size: 402791 KB
Manufacturer: TI
Download : Click here to Download
| Technical/Catalog Information | TLK3104SCGNT |
| Vendor | Texas Instruments |
| Category | Integrated Circuits (ICs) |
| Number of Drivers/Receivers | 4/4 |
| Type | Transceiver |
| Voltage - Supply | 2.3 V ~ 2.7 V |
| Package / Case | 289-BGA |
| Packaging | Tray |
| Protocol | IEEE 802 |
| Drawing Number | 296; 4201082; GNT; 289 |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Other Names | TLK3104SCGNT TLK3104SCGNT 296 13704 ND 29613704ND 296-13704 |
The TLK3104SCGNT is a flexible four-channel serial backplane transceiver, delivering high-speed bidirectional point-to-point data and transmissions providing up to 10 Gbps of data transmission capacity. The TLK3104SCGNT supports an operating range of serial data rates from 3.1 Gbps to 3.125 Gbps. The primary application of this device is to provide building blocks for developing point-to-point baseband data transmission over controlled impedance media of approximately 50 . The transmission media can be printed-circuit board traces, copper cables, or fiber-optical media. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.
The TLK3104SCGNT performs the parallel-to-serial, serial-to-parallel conversion, and clock extraction functions for a physical layer interface. The TLK3104SCGNT also provides an 8-bit/10-bit (8-b/10-b) encode/decode function. The serial transmitter and receiver use differential PECL compatible signalings. The parallel interface supports a low voltage differential signaling (LVDS) interface. The purpose of the interface is to provide a simple, inexpensive, and easy-to-implement interconnection between the controller and PHY. The LVDS interface supports independent 4-bit wide transmit and receive data paths for full-duplex operation.
The TLK3104SCGNT provides a comprehensive series of built-in tests for self-test purposes including internal serial loopback and PRBS generation and verification. An IEEE 1149.1 JTAG port is also supported. TLK3104SCGNT also has an MDIO/MDC serial port to provide certain control functions.
The TLK3104SCGNT operates with a single 2.5-V supply and dissipates less than 3 W. The device is packaged in a 19 * 19 mm, 289 pin plastic ball grid array (PBGA) package and is characterised for operation from 40°C to 75°C.
Supply voltage, VDD, VDDQ, VDDA (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 3 V
Input voltage, VI, (TTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . 0.3 V to 4 V
Voltage range at any terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to VDD + 0.3 V
Storage temperature, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . 65°C to 150°C
Electrostatic discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 3, A:2 kV
Ambient temperature range, TA, (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to 75°C
Junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . 125°C Max
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
2. PCB conditions is defined in JEDEC JESD51-7.
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