MFG:NS Package Cooled:DIP D/C:2005+
MFG: NS
Package Cooled: DIP
D/C: 2005+
Description: The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement out...
The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Common Clock (CPC), and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct Set (SDn) and Direct Clear (CDn) inputs. Data enters a master when both CPn and CPC are LOW and transfers to a slave when CPn or CPC (or both) go HIGH. The Master Set, Master Reset and individual CDn and SDn inputs override the Clock inputs. All inputs have 50 k pull-down resistors.
Storage Temperature (TSTG) −65°C to +150°C
Maximum Junction Temperature (TJ) +150°C
Pin Potential to Ground Pin (VEE) −7.0V to +0.5V
Input Voltage (DC) VEE to +0.5V
Output Current
(DC Output HIGH) −50 mA
ESD (Note 2) 2000V
35% power reduction of the 100131
2000V ESD protection
Pin/function compatible with 100131
Voltage compensated operating range = −4.2V to −5.7V
Available to industrial grade temperature range
Available to Standard Microcircuit Drawing (SMD) 5962-9153601
100331
PDF/DataSheet Download
INDUCTOR RIBBON-LEAD .033UH SMD
The 100329A is an octal registered bidirectional translator designed to convert TTL logic levels to 100K ECL logic lev- els and vice versa. The direction of the translation is deter- mined by the DIR input. A LOW on the output enable input (OE) holds the ECL...
The 100329 is an octal registered bidirectional translator designed to convert TTL logic levels to 100K ECL logic levels and vice versa. The direction of the translation is determined by the DIR input. A LOW on the output enable input (OE) holds the ECL outp...
The 100328 is an octal latched bi-directional translator designed to convert TTL logic levels to 100K ECL logic levels and vice versa. The direction of this translation is determined by the DIR input. A LOW on the output enable input (OE) holds the ECL outpu...
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