100336

The 100336 operates as either a modulo-16 up/down counter or as a 4-bit bidirectional shift register. Three Select (Sn) inputs determine the mode of operation, as shown in the Function Select table. Two Count Enable (CEP, CET) inputs are provided for ease of cascading in multistage counters. One Count Enable (CET) input also doubles as a Serial Data (D0) input for shift-up operation. For shift-down operation, D3 is the Serial Data input. In counting operations the Terminal Count (TC ) output goes LOW when the counter reaches 15 in the count/up mode or 0 (zero) in the count/down mode. In the shift modes, the TC output repeats the Q3 output. The dual nature of this TC/Q3 output and the D0/CET input means that one interconnection from one stage to the next higher stage serves as the link for multistage counting or shift-up operation. The individual Preset (Pn) inputs are used to enter data in parallel or to preset the counter in programmable counter applications. A HIGH signal on the Master Reset (MR) input overrides all other inputs and asynchronously clears the flipflops. In addition, a synchronous clear is provided, as well as a complement function which synchronously inverts the contents of the flip-flops. All inputs have 50 k pull-down resistors.