10KE

Features: Embedded programmable logic devices (PLDs), providing system-on-a-programmable-chip (SOPC) integration in a single device Enhanced embedded array for implementing megafunctions such as efficient memory and specialized logic functions Dual-port capability with up to 16-bit width per em...

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10KE: Features: Embedded programmable logic devices (PLDs), providing system-on-a-programmable-chip (SOPC) integration in a single device Enhanced embedded array for implementing megafunctions such as e...

floor Price/Ceiling Price

Part Number:
10KE
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/28

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Product Details

Description



Features:

Embedded programmable logic devices (PLDs), providing system-on-a-programmable-chip (SOPC) integration in a single device
   Enhanced embedded array for implementing megafunctions such as efficient memory and specialized logic functions
   Dual-port capability with up to 16-bit width per embedded array block (EAB)
   Logic array for general logic functions
High density
   30,000 to 200,000 typical gates (see Tables 1 and 2)
   Up to 98,304 RAM bits (4,096 bits per EAB), all of which can be used without reducing logic capacity
System-level features
   Multi VoltTM I/O pins can drive or be driven by 2.5-V, 3.3-V, or 5.0-V devices
   Low power consumption
   Bidirectional I/O performance (tSU and tCO) up to 212 MHz
   Fully compliant with the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2 for 3.3-V operation at 33 MHz or 66 MHz
   -1 speed grade devices are compliant with PCI Local Bus Specification, Revision 2.2, for 5.0-V operation
   Built-in Joint Test Action Group (JTAG) boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990, available without consuming additional device logic.



Description

Altera FLEX 10KE devices are enhanced versions of FLEX 10K devices. Based on reconfigurable CMOS SRAM elements, the FLEX architecture incorporates all features necessary to implement common gate array megafunctions. With up to 200,000 typical gates, FLEX 10KE devices provide the density, speed, and features to integrate entire systems, including multiple 32-bit buses, into a single device.

The ability to reconfigure FLEX 10KE devices enables 100% testing prior to shipment and allows the designer to focus on simulation and design verification. FLEX 10KE reconfigurability eliminates inventory management for gate array designs and generation of test vectors for fault coverage.

Table 5 shows FLEX 10KE performance for some common designs. All performance values were obtained with Synopsys DesignWare or LPM functions. Special design techniques are not required to implement the applications; the designer simply infers or instantiates a function in a Verilog HDL, VHDL, Altera Hardware Description Language (AHDL), or schematic design file.




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