2308-2HDCG General Description
HI SPD PHASE LOCK LOOP
2308-2HDCG Maximum Ratings
| Input Frequency | |
| No. of Inputs | |
| Temperature | C |
| Output Frequency | |
| No. of Outputs | |
| Voltage | 3.3 V |
| Package | SOIC 16 |
| Speed | NA |
| Input | |
| Output | |
| Output Skew | |
| Max Prop Delay | |
| Multiply | |
| Divide | |
| Jitter cycle-to-cycle | |
| Type | |
Map list: ABCDEFGHIJKLMNOPQRSTUVWXYZ 0123456789All