2SD2114

      The 2SD2114 is a 0.5A,25V NPN plastic encapsulated transistor,and it has 3 features,one is high DC current gain:hFE=1200(Typ);the second is high emitter-base voltage VCBO=12V(Min);the third is low VCE(sat)=0.18V(Typ)(IC/IB=500mA/20mA).
      The absolute maximun ratings of the 2SD2114 at Ta=25°C having Collector to base Voltage VCBO is 25V;Collector to emitter Voltage VCEO is 20 V;Emitter to base Voltage VEBO is 12 V;Collector Current-continuous IC is 12A;Junction temperature is +150°C ;Storage temperature is -55 to +150°C ;collector power Dissipation Pc  is 250 mW etc.   
      The automatic sector/page erase of the 2SD2114 begins after the erase command is completed, right from the rising edge of the #WE pulse for the last sector/page erase command pulse and terminates when the data on DQ7, Data Polling, is "1" at which time the device returns to the read mode. Data Polling must be performed at an address within any of the sectors/pages being erased.
      The 2SD2114 is Single chip transmit and receive interface for E3, DS3 and STS-1 applications. Interface to 75 ohm coaxial cable over 1100 feet at speeds up to 51.84 Mbps. Compliant with ANSI T1.102-1993, Telcordia GR-499-CORE and GR-253-CORE, ITU-T G.703 and G.823 for jitter tolerance. Compliant with ATM FORUM af-phy-0034 (E3 public UNI) and af-phy-0054 (DS3 public UNI). Easily Interfaced to ATM framer ICs such as PMC 7345 , 7346 QJET and 7321. Unique clock recovery requires no reference clock or crystal oscillator. Receive DS3-high signal Includes diagnostic loop-back for AMI and digital signals. Pin compatible to 78P7200 and 78P2241 (28- lead PLCC). 28-lead PLCC and 48-lead TQFP packages 3.3 or 5 V operation, ICC<95mA Input circuit works either Transformer or Capacitor coupled.  In the event of a conflict between the text of this document and the references cited herein, the text of this document takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.
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