508MLF

Specifications

Temperature C Voltage 3.3 V Package SOIC 8 Speed NA Core Supply Voltage (VDD) No. of Outputs 1 Min. Output Frequency 0 Min. Input Frequency 0 Output Supply Voltage (VDDO) No. of Inputs 1 Input Style Single Ended Max. Output Frequency 250MHz Max. Input Frequency 250MHz Output Style LVPECL Temp. Grade C


Description

PECL TO CMOS CONVERT
The 508MLF is the most cost effective way to generate a high quality, high frequency CMOS clock output from a PECL clock input. The 508MLF has separate VDD supplies for the PECL input buffer and the output buffer, allowing different voltages to be used.

508MLF features:

Packaged in 8 pin SOIC or die

Separate VDD supplies allow voltage translation

Clock frequency of 0 - 250 MHz

Duty cycle of 45/55

Operating voltages of 2.375 to 5.5 V

Tri-state output for board level testing

24 mA output drive capability

Industrial temperature version available

Advanced, low power, sub-micron CMOS process