511MIT

Specifications

Input Frequency 2 MHz to 50 MHz No. of Inputs 1 Temperature I Output Frequency 4 MHz to 200 MHz Input Type Clock,Crystal No. of Outputs 1 Output Type CMOS Voltage 3.3 V Package SOIC 8 Speed NA Core Supply Voltage (VDD) 3.3 V to 5 V Output Supply Voltage (VDDO) 3.3 V to 5 V Peak-to-Peak Period Jitter ± 70 ps Pk-to-Pk


Description

LOCO PLL CLOCK MULTIPLIER
The ICS511 is the most cost effective way to generate a high quality, high frequency clock output from a lower frequency crystal or clock input, and is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked Loop (PLL) techniques, the ICS511 uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 200 MHz.

Stored in the chip's ROM is the ability to generate ninedifferent multiplication factors, allowing one chip tooutput many common frequencies. The ICS511 also has an output enable pin which tri-states the clock output when the OE pin is taken low.

ICS511 features:

Packaged as 8-pin SOIC or die

Available in Pb (lead) free package

Upgrade to popular ICS501 with:
- changed multiplier table
- faster operating frequencies
- output duty cycle at VDD/2

Zero ppm multiplication error

Input crystal frequency of 5 - 27 MHz

Input clock frequency of 2 - 50 MHz

Output clock frequencies up to 200 MHz

Extremely low jitter of 25 ps (one sigma)

Compatible with all popular CPUs

Duty cycle of 45/55 up to 200 MHz

Mask option for nine selectable frequencies

Operating voltages of 3.3 or 5 V

Tri-state output for board level testing

Industrial temperature version available

Advanced, low-power CMOS proces