512K

The Mobile Pentium III Processor-M uses Assisted GTL (AGTL) signaling on the PSB interface. The main difference between AGTL and GTL+ used on previous Intel processors is VCCT = 1.25V for AGTL versus 1.5V for GTL+. The lower voltage swing enables high performance at lower power.The Low Voltage Mobile Pentium III Processor-M will support 100-MHz and 133-MHz bus frequencies. The Ultra Low Voltage Mobile Pentium III Processor-M supports a 100-MHz bus frequency.

The 512K on die integrated L2 cache on the Mobile Pentium III Processor-M is double the L2 cache size on the mobile Pentium III processor. The L2 cache runs at the processor core speed and the increased cache size provides superior processing power.

The Mobile Intel Pentium III Processor-M is the first mobile Intel processor to support Differential Clocking. Differential clocking requires the use of two complementary clocks: BCLK and BCLK#.Benefits of differential clocking include easier scaling to lower voltages, reduced EMI, and less jitter.

All references to BCLK in this document apply to BCLK# also even if not explicitly stated. The Mobile Intel Pentium III Processor-M will also support Single Ended Clocking. The processor will configure itself for differential or single ended clocking based on the waveforms detected on the BCLK and BCLK#/CLKREF signal lines.

The Deeper Sleep State is a new low power state on the Mobile Intel Pentium III Processor-M. It is functionally identical to the Deep Sleep State but at a lower voltage. More details are provided in Section 2.2.7.

The Mobile Intel Pentium III Processor-M 512K has some configuration options that are determined by hardware and some that are determined by software. The processor samples its hardware configuration at reset on the active-to-inactive transition of RESET#. The P6 Family of Processors Developer's Manual describes these configuration options. Some of the configuration options for the Mobile Intel Pentium III Processor-M 512K are described in the remainder of this section.