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MFG:N/A  Package Cooled:CDIP  D/C:N/A  

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Part Number: 54ACTQ273

 

MFG: N/A

Package Cooled: CDIP

D/C: N/A

Description: The ACTQ273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Cloc...


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54ACTQ273 General Description


The ACTQ273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously.The register is fully edge-triggered. The state of each D input,one setup time before the LOW-to-HIGH clock transition,is transferred to the corresponding flip-flop's Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements.
The ACTQ utilizes NSC Quiet Series technology to guarantee quiet output switching and improved dynamic thresholdperformance. FACT Quiet Series™ features GTO™ output control and undershoot corrector in addition to a split ground bus for superior performance.

54ACTQ273 Maximum Ratings

Supply Voltage (VCC)                       −0.5V to +7.0V
DC Input Diode Current (IIK)
VI = −0.5V                                        −20 mA
VI = VCC + 0.5V                               +20 mA
DC Input Voltage (VI)                       −0.5V to VCC + 0.5V
DC Output Diode Current (IOK)
VO = −0.5V                                       −20 mA
VO = VCC + 0.5V                              +20 mA
DC Output Voltage (VO)                   −0.5V to VCC + 0.5V
DC Output Source
or Sink Current (IO)                          ±50 mA
DC VCC or Ground Current
per Output Pin (ICC or IGND)            ±50 mA
Storage Temperature (TSTG)            −65°C to +150°C
DC Latch-up Source or
Sink Current                                      ±300 mA
Junction Temperature (TJ)
CDIP                                                  175°C

54ACTQ273 Features

ICC reduced by 50%
Guaranteed simultaneous switching noise level and dynamic threshold performance
Improved latch-up immunity
Buffered common clock and asynchronous master reset
Outputs source/sink 24 mA
Faster prop delays than the standard 'AC/'ACT273
4 kV minimum ESD immunity
Standard Microcircuit Drawing (SMD) 5962-89735

54ACTQ273 datasheet

54ACTQ273
PDF/DataSheet Download

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