MFG:N/A Package Cooled:CDIP D/C:N/A
MFG: N/A
Package Cooled: CDIP
D/C: N/A
Description: The 'F377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The comm...
The 'F377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.
The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's Q output. The CE input must be stable only one setup time prior to the LOW-to-HIGH clock transition for predictable operation.
54F377DM
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The 54F374 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for bus-oriented applications. A buffered Clock (CP) and Output Enable (OE#) are common to all flip-flops.
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