54F/74F533

Storage Temperature                                   -65°C to +150°C
Ambient Temperature under Bias                 -55°C to +125°C
Junction Temperature under Bias                 -55°C to +175°C
Plastic                                                           -55°C to +150°C
VCC Pin Potential to
Ground Pin                                                         -0.5V to +7.0V
Input Voltage (Note 2)                                       -0.5V to +7.0V
Input Current (Note 2)                                 -30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with V_CC e 0V)
Standard Output                                                  -0.5V to V_CC
TRI-STATEÉ Output                                           -0.5V to +5.5V
Current Applied to Output
in LOW State (Max)                           twice the rated IOL (mA)
ESD Last Passing Voltage (Min)                                    4000V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.

The 54F/74F533 consists of eight latches with TRI-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH the bus output is in the high impedance state. The 54F/74F533 is the same as the 'F373, except that the outputs are inverted.