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Part Number: 72T20128L10BB

 

 

 

 

Description: 2.5V 256 X 20 DDR TERASYN Double Data Rate Port Selectable, Bus Matching, 3.3/2.5/1.8/1.5-V port selectable I/O, Read Echo Out...


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72T20128L10BB General Description


2.5V 256 X 20 DDR TERASYN
Double Data Rate Port Selectable, Bus Matching, 3.3/2.5/1.8/1.5-V port selectable I/O, Read Echo Outputs

72T20128L10BB Maximum Ratings

Package PBGA 208 Speed 10 NS Temperature C Voltage 2.5 V Density 5 Mb Organization 256K x 20,512K x 10 Access Time 4.5 ns I/O Type 1.5 V HSTL,1.8 V HSTL,2.5 V LVTTL,3.3 V LVTTL Function JTAG,DDR/SDR,Bus Matching,Mark & Retransmit Family Name TeraSyncDDR Flags Empty/Full,Partial Full,Programmable,Partial Empty Bus Width x10/x20 Architecture Uni-directional Timing Type DDR Synchronous

72T20128L10BB datasheet

72T02GH
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