74ALVC162839

Features: ` Compatible with PC100 and PC133 DIMM module specifications` 1.65V3.6V VCC supply operation` 3.6V tolerant inputs and outputs` 26 series resistors in the outputs` tPD (CLK to On)4.6 ns max for 3.0V to 3.6V VCC6.3 ns max for 2.3V to 2.7V VCC9.8 ns max for 1.65V to 1.95V VCC` Power-off hi...

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74ALVC162839 Picture
SeekIC No. : 004249364 Detail

74ALVC162839: Features: ` Compatible with PC100 and PC133 DIMM module specifications` 1.65V3.6V VCC supply operation` 3.6V tolerant inputs and outputs` 26 series resistors in the outputs` tPD (CLK to On)4.6 ns ma...

floor Price/Ceiling Price

Part Number:
74ALVC162839
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/3

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Product Details

Description



Features:

` Compatible with PC100 and PC133 DIMM module specifications
` 1.65V3.6V VCC supply operation
` 3.6V tolerant inputs and outputs
` 26 series resistors in the outputs
` tPD (CLK to On)
4.6 ns max for 3.0V to 3.6V VCC
6.3 ns max for 2.3V to 2.7V VCC
9.8 ns max for 1.65V to 1.95V VCC
` Power-off high impedance inputs and outputs
` Supports live insertion and withdrawal (Note 1)
` Uses patented noise/EMI reduction circuitry
` Latchup conforms to JEDEC JED78
` ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.





Pinout

  Connection Diagram




Specifications

Supply Voltage (VCC) -0.5V to +4.6V
DC Input Voltage (VI) -0.5V to 4.6V
Output Voltage (VO) (Note 2) -0.5V to VCC +0.5V
DC Input Diode Current (IIK)
VI < 0V -50 mA
DC Output Diode Current (IOK)
VO < 0V -50 mA
DC Output Source/Sink Current
(IOH/IOL) ±50 mA
DC VCC or GND Current per
Supply Pin (ICC or GND) ±100 mA
Storage Temperature Range (TSTG) -65°C to +150°C

Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation.
Note 2: IO Absolute Maximum Rating must be observed.





Product Product status Eco Status Pricing* Package type Leads Packing method Package Drawing Package Marking Convention**
74ALVC162839T Full Production RoHS Compliant $2.21 TSSOP 56 RAIL Line 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code)
&K Line 2: ALVC Line 3: 162839
74ALVC162839TX Full Production RoHS Compliant $2.21 TSSOP 56 TAPE REEL Line 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code)
&K Line 2: ALVC Line 3: 162839
* Fairchild 1,000 piece Budgetary Pricing
** A sample button will appear if the part is available through Fairchild's on-line samples program. If there is no sample button, please contact a Fairchild distributor to obtain samples

Package marking information for product 74ALVC162839 is available. Click here for more information .





Description

The 74ALVC162839 contains twenty non-inverting selectable buffered or registered paths. The device can be configured to operate in a registered, or flow through buffer mode by utilizing the register enable (REGE) and Clock (CLK) signals. The device operates in a 20-bit word wide mode. All outputs can be placed into 3-STATE through use of the OE pin. These devices are ideally suited for buffered or registered 168 pin and 200 pin SDRAM DIMM memory modules.

The 74ALVC162839 is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V.The 74ALVC162839 is also designed with 26 series resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters.

The 74ALVC162839 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation






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