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74AVCH2T45

Features: ` Wide supply voltage range:` V CC(A): 0.8 V to 3.6 V` V CC(B): 0.8 V to 3.6 V` High noise immunity` Complies with JEDEC standards:` JESD8-12 (0.8 V to 1.3 V)` JESD8-11 (0.9 V to 1.65 V)` JESD8-7 (1.2 V to 1.95 V)` JESD8-5 (1.8 V to 2.7 V)` JESD8-B (2.7 V to 3.6 V)` ESD protection:` HBM ...

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SeekIC No. : 004249577 Detail

74AVCH2T45: Features: ` Wide supply voltage range:` V CC(A): 0.8 V to 3.6 V` V CC(B): 0.8 V to 3.6 V` High noise immunity` Complies with JEDEC standards:` JESD8-12 (0.8 V to 1.3 V)` JESD8-11 (0.9 V to 1.65 V)` ...

74AVCH2T45 Data Sheet

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Part Number:
74AVCH2T45
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

` Wide supply voltage range:
` V CC(A): 0.8 V to 3.6 V
` V CC(B): 0.8 V to 3.6 V
` High noise immunity
` Complies with JEDEC standards:
` JESD8-12 (0.8 V to 1.3 V)
` JESD8-11 (0.9 V to 1.65 V)
` JESD8-7 (1.2 V to 1.95 V)
` JESD8-5 (1.8 V to 2.7 V)
` JESD8-B (2.7 V to 3.6 V)
` ESD protection:
` HBM JESD22-A114E Class 3B exceeds 8000 V
` MM JESD22-A115-A exceeds 200 V
`CDM JESD22-C101C exceeds 1000 V
` Maximum data rates:
` 500 Mbps (1.8 V to 3.3 V translation)
` 320 Mbps (< 1.8 V to 3.3 V translation)
` 320 Mbps (translate to 2.5 V or 1.8 V)
` 280 Mbps (translate to 1.5 V)
` 240 Mbps (translate to 1.2 V)
` Suspend mode
` Bus hold on data inputs
` Latch-up performance exceeds 100 mA per JESD 78 Class II
` Inputs accept voltages up to 3.6 V
` Low noise overshoot and undershoot < 10 % of VCC
` IOFF circuitry provides partial Power-down mode operation
` SOT765-1 and SOT833-1 package options
` Specified from -40 to +85 and -40 to +125


Pinout

Connection Diagram


Specifications

Symbol
Parameter
Conditions
Min
Max
Unit
V CC(A)
 supply voltage port A  
-0.5
+4.6
V
V CC(B)
 supply voltage port B  
-0.5
+4.6
V
IIK
 input clamping current VI < 0 V
-50
-
mA
VI
 input voltage                                                   [1]
-0.5
+4.6
V
IOK
 output clamping current VO < 0 V
-50
-
mA
VO
 output voltage Active mode                        [1][2][3]
-0.5
VCCO + 0.5
V
Suspend or 3-state mode         [1]
-0.5
+4.6
V
IO
 output current VO = 0 V to VCC
-
±50
mA
ICC
 supply current ICC(A) or ICC(B)
-
100
mA
IGND
 ground current  
-100
-
mA
Tstg
 storage temperature  
-65
+150
Ptot
 total power dissipation Tamb = -40 to +125 [4]
-
250
mW
[1] The minimum input voltage rating and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] VCCO is the supply voltage associated with the output port.
[3] VCCO + 0.5 V should not exceed 4.6 V.
[4] For VSSOP8 package: above 110 the value of Ptot derates linearly with 8 mW/K.
      For XSON8 package: above 45 the value of Ptot derates linearly with 2.4 mW/


Description

The 74AVCH2T45 is a dual bit, dual supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual supply pins (V CC(A) and V CC(B)). Both V CC(A) and V CC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nA and DIR are referenced to V CC(A) and pins nB are referenced to V CC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA.

The 74AVCH2T45 is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either V CC(A) or V CC(B) are at GND level, both A and B are in the high-impedance OFF-state.

The 74AVCH2T45 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.




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