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Part Number: 74F219A
Description: The 74F219A is a high speed, 64bit RAM organized as a 16word by 4bit array. Address inputs are buffere...
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74F219A
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DataSheet
General Description
74F219A General Description
The 74F219A is a high speed, 64bit RAM organized as a 16word by 4bit array. Address inputs are buffered to minimize loading and are fully decoded on chip. The outputs are in high impedance state whenever the chip enable (CE) is high. The outputs are active only in the READ mode (WE = high) and the output data is the complement of the stored data.
74F219A Maximum Ratings
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
Unless otherwise noted these limits are over the operating free-air temperature range.)
| SYMBOL | PARAMETER | RATING | UNIT |
| VCC | Supply voltage | 0.5 to +7.0 | V |
| VIN | Input voltage | 0.5 to +7.0 | V |
| IIN | Input current | 30 to +5 | mA |
| VOUT | Voltage applied to output in High output state | 0.5 to VCC | V |
| IOUT | Current applied to output in Low output state | 48 | mA |
| Tamb | Operating free-air temperature range | 0 to +70 | °C |
| Tstg | Storage temperature range | 65 to +150 | °C |
74F219A Features
• High speed performance
• Replaces 74F219
• Address access time: 8ns max vs 28ns for 74F219
• Power dissipation: 4.3mW/bit typ
• Schottky clamp TTL
• One chip enable
• NonInverting outputs (for inverting outputs see 74F189A)
• 3state outputs
• 74F219A in 150 mil wide SO is preferred options for new designs
• C3F219A in 300 mil wide SOL replaces 74F219 in existing designs
• Replaces 74F219
• Address access time: 8ns max vs 28ns for 74F219
• Power dissipation: 4.3mW/bit typ
• Schottky clamp TTL
• One chip enable
• NonInverting outputs (for inverting outputs see 74F189A)
• 3state outputs
• 74F219A in 150 mil wide SO is preferred options for new designs
• C3F219A in 300 mil wide SOL replaces 74F219 in existing designs
74F219A Typical Application
• Scratch pad memory
• Buffer memory
• Push down stacks
• Control store
• Buffer memory
• Push down stacks
• Control store
74F219A Connection Diagram
74F219A
PDF/DataSheet Download
- Datasheet: 74F219A
- File Size: 104606 KB
- Manufacturer: Philips
- Click here to Download
- ·74F00
- PHILIPS [Philips Semiconductors]
- Quad 2-input NAND gate
- 49449 KB
- ·74F00PC
- FAIRCHILD [Fairchild Semiconductor]
- Quad 2-Input NAND Gate
- 112191 KB
- ·74F00PCX
- FAIRCHILD [Fairchild Semiconductor]
- Quad 2-Input NAND Gate
- 62759 KB
- ·74F00SC
- FAIRCHILD [Fairchild Semiconductor]
- Quad 2-Input NAND Gate
- 112191 KB
- ·74F00SCX
- FAIRCHILD [Fairchild Semiconductor]
- Quad 2-Input NAND Gate
- 62759 KB
- ·74F00SJ
- NSC [National Semiconductor]
- Quad 2-Input NAND Gate
- 112191 KB
- ·74F00SJX
- FAIRCHILD [Fairchild Semiconductor]
- Quad 2-Input NAND Gate
- 70739 KB
- ·74F02
- FAIRCHILD [Fairchild Semiconductor]
- Quad 2-Input NOR Gate
- 49129 KB
74F219A Relative Products
74F219
The 74F219 is a high-speed 64-bit RAM organized as a 16-word by 4-bit array. Address inputs are buffered to minimize loading and are fully decoded on-chip. The outputs are TRI-STATE and are in the high-impedance state whenever the Chip Select (CS) input of t...
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74F20SCX
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74F20SC
The 74F20SC contains two independent gates, each of which performs the logic NAND function.
74F20PC
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