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74F377A

Features: • High impedance inputs for reduced loading (20mA in Low and High states)• Ideal for addressable register applications• Enable for address and data synchronization applications• Eight edgetriggered Dtype flipflops• Buffered common clock• See 'F273A for...

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SeekIC No. : 004249758 Detail

74F377A: Features: • High impedance inputs for reduced loading (20mA in Low and High states)• Ideal for addressable register applications• Enable for address and data synchronization applic...

74F377A Data Sheet

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Part Number:
74F377A
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• High impedance inputs for reduced loading (20mA in Low and High states)
• Ideal for addressable register applications
• Enable for address and data synchronization applications
• Eight edgetriggered Dtype flipflops
• Buffered common clock
• See 'F273A for Master Reset version
• See 'F373 for transparent latch version
• See 'F374 for 3State version


Pinout

Connection Diagram


Specifications

SYMBOL
PARAMETER
RATING
UNIT
VCC Supply voltage
0.5 to +7.0
V
VIN Input voltage
0.5 to +7.0
V
IIN Input current
30 to +5
mA
VOUT Voltage applied to output in high output state
0.5 to VCC
V
IOUT Current applied to output in low output state
40
mA
Tamb Operating free air temperature range
0 to +70
°C
Tstg Storage temperature range
65 to +150
°C



Description

The 74F377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low.

The register of the 74F377A is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop's Q output.

The E input of the 74F377A must be stable one setup time prior to the Low-to-High clock transition for predictable operation.




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