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MFG:TI Package Cooled:SOP
Part Number: 74F377A
MFG: TI
Package Cooled: SOP
Description: The 74F377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common ...
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74F377A
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DataSheet
General Description
74F377A General Description
The 74F377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low.
The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop's Q output.
The E input must be stable one setup time prior to the Low-to-High clock transition for predictable operation.
74F377A Maximum Ratings
|
SYMBOL |
PARAMETER |
RATING |
UNIT |
| VCC | Supply voltage |
0.5 to +7.0 |
V |
| VIN | Input voltage |
0.5 to +7.0 |
V |
| IIN | Input current |
30 to +5 |
mA |
| VOUT | Voltage applied to output in high output state |
0.5 to VCC |
V |
| IOUT | Current applied to output in low output state |
40 |
mA |
| Tamb | Operating free air temperature range |
0 to +70 |
°C |
| Tstg | Storage temperature range |
65 to +150 |
°C |
74F377A Features
• High impedance inputs for reduced loading (20mA in Low and High states)
• Ideal for addressable register applications
• Enable for address and data synchronization applications
• Eight edgetriggered Dtype flipflops
• Buffered common clock
• See 'F273A for Master Reset version
• See 'F373 for transparent latch version
• See 'F374 for 3State version
• Ideal for addressable register applications
• Enable for address and data synchronization applications
• Eight edgetriggered Dtype flipflops
• Buffered common clock
• See 'F273A for Master Reset version
• See 'F373 for transparent latch version
• See 'F374 for 3State version
74F377A Connection Diagram
74F377A
PDF/DataSheet Download
- Datasheet: 74F377A
- File Size: 86174 KB
- Manufacturer: PHILIPS [Philips Semiconductors]
- Click here to Download
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74F377A Relative Products
74F377
The 74F377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.The register of the 74F377is fully edge-triggered. The ...
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