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Part Number: 74F50729
Description: The 74F50729 is a dual positive edgetriggered Dtype featuring individual data, clock, set and reset in...
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74F50729
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DataSheet
General Description
74F50729 General Description
The 74F50729 is a dual positive edgetriggered Dtype featuring individual data, clock, set and reset inputs; also true and complementary outputs.
The 74F50729 is designed so that the outputs can never display a metastable state due to setup and hold time violations. If setup time and hold time are violated the propagation delays may be extended beyond the specifications but the outputs will not glitch or display a metastable state. Typical metastability parameters for the 74F50729 are: t @ 135ps and t @ 9.8 X 106 sec where t represents a function of the rate at which a latch in a metastable state resolves that condition and To represents a function of the measurement of the propensity of a latch to enter a metastable state.
Set (SDn) and reset (RDn) are asynchronous positiveedge triggered inputs and operate independently of the clock (CPn) input. Data must be stable just one setup time prior to the lowtohigh transition of the clock for guaranteed propagation delays.
Clock triggering occurs at a voltage level and is not directly related to the transition time of the positivegoing pulse. Following the hold time interval, data at the Dn input may be changed without affecting the levels of the output.
74F50729 Maximum Ratings
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.)
|
SYMBOL |
PARAMETER |
RATING |
UNIT | |
|
VCC |
Supply voltage |
0.5 to +7.0 |
V | |
|
VIN |
Input voltage |
0.5 to +7.0 |
V | |
|
IIN |
Input current |
30 to +5 |
mA | |
|
VOUT |
Voltage applied to output in High output state |
0.5 to VCC |
V | |
|
IOUT |
Current applied to output in Low output state |
40 |
mA | |
|
Tamb |
Operating free air temperature range | Commercial range |
0 to +70 |
|
| Industrial range |
40 to +85 |
|||
|
Tstg |
Storage temperature range |
65 to +150 |
||
74F50729 Features
• Metastable immune characteristics
• Output skew less than 1.5ns
• High source current (IOH = 15mA) ideal for clock driver applications
• See 74F5074 for synchronizing dual Dtype flipflop
• See 74F50109 for synchronizing dual JK positive edgetriggered flipflop
• See 74F50728 for synchronizing cascaded dual Dtype flipflop
• Industrial temperature range available (40°C to +85°C)
• Output skew less than 1.5ns
• High source current (IOH = 15mA) ideal for clock driver applications
• See 74F5074 for synchronizing dual Dtype flipflop
• See 74F50109 for synchronizing dual JK positive edgetriggered flipflop
• See 74F50728 for synchronizing cascaded dual Dtype flipflop
• Industrial temperature range available (40°C to +85°C)
74F50729 Connection Diagram
74F50729
PDF/DataSheet Download
- Datasheet: 74F50729
- File Size: 108014 KB
- Manufacturer: Philips
- Click here to Download
- ·74F00
- PHILIPS [Philips Semiconductors]
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- ·74F00PC
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- ·74F00PCX
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- ·74F00SC
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- ·74F00SCX
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- ·74F00SJ
- NSC [National Semiconductor]
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- ·74F00SJX
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- ·74F02
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