74FCT273AT

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.

The 74FCT273AT is an octal D flip-flop built using an advanced dual metal CMOS technology. The FCT273T has eight edge-triggered D-type flipflops with individual D inputs and O outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously.

The register of the 74FCT273AT is fully edge-triggered. The state of each D input, one setup time before the low-to-high clock transition, is transferred to the corresponding flip-flop's O output.

All outputs of the 74FCT273AT will be forced low independently of Clock or Data inputs by a low voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements.