74HC125D

The 74HC125D is one member of the 74HC125 family which is designed as the high speed CMOS QUAD bus buffer (3-state) that is fabricated in silicon gate CMOS technology. This device requires the same 3-STATE control input G to be taken high to make the output go into the high impedance state, and all inputs of it are equipped with protection circuits against static discharge and transient excess voltage.

Features of the 74HC125D are:(1)high speed: tPD = 8 ns (typ.) AT Vcc = 5 V ; (2)lowpower dissipation: Icc = 4 mA (max.) AT 25 °C ; (3)output drive capabil-ity: 15 LSTTL loads ; (4)balanced propagation delays: tPLH = tPHL ; (5)symmetrical output impedance: IOL = zIOHz = 6 mA (min.) ; (6)high noise immunity: VNIH = VNIL = 28 % Vcc (min.) ; (7)wide operating voltage range: VCC (opr) = 2 V TO 6 V ; (8)pin and function compatible with 54/74LS125/126.

The absolute maximum ratings of the 74HC125D can be summarized as:(1)supply voltage: -0.5 to +7 V;(2)DC input voltage: -0.5 to Vcc+0.5 V;(3)DC output voltage: -0.5 to Vcc+0.5 V;(4)DC input diode current: ±20 mA;(5)DC output diode current: ±20 mA;(6)DC output source sink current per output pin: ±35 mA;(7)DC Vcc or ground current:±70 mA;(8)power dissipation:500 mW;(9)storage temperature:-65 to +150;(10)lead temperature (10 sec): 300. If you want to know more information such as the electrical characteristics about the 74HC125D, please download the datasheet in www.seekic.com or www.chinaicmart.com .