MFG:Other Category:Other
Category: Other
MFG: Other
Description: The 74HC126 is designed as high-speed si-gate CMOS devices and are pin compatible with low power schottky TTL (LSTTL). It...
The 74HC126 is designed as high-speed si-gate CMOS devices and are pin compatible with low power schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A which is four non-inverting buffer drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A low at nOE causes the outputs to assume a high impedance off-state. It has two features which means its output capability would be bus driver and ICC category would be MSI.
Some important AC characteristics and specifications of the 74HC126 have been concluded into several points as follow.For Tamb=25°C the first one is about its propagation delay which would be typ 30ns and max 100ns at Vcc=2.0V and would be typ 11ns and max 20ns at Vcc=4.5V and would be typ 9ns and max 17ns at Vcc=6.0V. The second one is about its 3-state output enable time which would be typ 41ns and max 125ns at Vcc=2.0V and typ 15ns and max 25ns at Vcc=4.5V and would be typ 12ns and max 21ns at Vcc=6.0V. The third one is about its 3-state output disable time which would be typ 41ns and max 125ns at Vcc=2.0V and typ 15ns and max 25ns at Vcc=4.5V and would be typ 12ns and max 21ns at Vcc=6.0V. The fourth one is about its output transition time which would be typ 14ns and max 60ns at Vcc=2.0V and typ 5ns and max 12ns at Vcc=4.5V and would be typ 4ns and max 10ns at Vcc=6.0V.
Also for the Tamb range of -40 to +125°C the first one is about its propagation delay which would be max 150ns at Vcc=2.0V and would be max 30ns at Vcc=4.5V and would be max 26ns at Vcc=6.0V. The second one is about its 3-state output enable time which would be max 190ns at Vcc=2.0V and max 38ns at Vcc=4.5V and would be max 32ns at Vcc=6.0V. The third one is about its 3-state output disable time which would be max 190ns at Vcc=2.0V and max 38ns at Vcc=4.5V and would be max 32ns at Vcc=6.0V. The fourth one is about its output transition time which would be max 90ns at Vcc=2.0V and max 18ns at Vcc=4.5V and would be max 15ns at Vcc=6.0V. And so on. For more information please contact us.
74HC126
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IC BUFFER DVR TRI-ST QD 14PDIP
IC BUFFER QUAD 3ST 14-TSSOP
IC BUFF TRI-ST QD N-INV 14SOIC
IC BUFFER DVR TRI-ST QD 14SOICN
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