74HC138D

The 74HC138D is a type of high-speed Si-gate CMOS devices,which is specified in compliance with JEDEC standard no. 7A.The 74HC138D decoders allow three binary weighted address inputs (A0, A1, A2) and when enabled, offer 8 mutually exclusive active low outputs (Y0 to Y7). The"138"features three enable inputs:two active low(E1 and E2) and one active high (E3).Every output will be high unless E1 and E2 are low and E3 is high.This multiple enable function allows easy parallel expansion of the "138" to a 1-of-32 decoder with just four "138" ICs and one inverter.The "138" can be applied in an eight output demultiplexer by using one of the active low enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active high or low state.

The 74HC138D has many outstanding features shown below:(1)demultiplexing capability;(2)multiple input enable for easy expansion;(3)ideal for memory chip select decoding;(4)active LOW mutually exclusive outputs;(5)output capability is standard;(6)ICC category is MSI.

Some quick data(GND=0 V;Tamb = 25°C;tr=tf=6 ns) of the 74HC138D have been concluded and listed below:(1):propagation delay between An and Yn is 12 ns typ, between E3 and Yn is 14 ns when CL is 15 pF and VCC is 5 V;(2):input capacitance is 3.5 pF typ;(3):power dissipation capacitance per package is 67 pF typ. It also have some AC characteristics:(1)propagation delay(An to Yn) is 41 ns typ and 150 ns max when the temperature is +25 and Vcc is 2.(2): propagation delay(E3 to Yn) is 47ns typ and 150 ns max when the temperature is +25 and Vcc is 2.0 V;(3):propagation delay(En to Yn) of the 74HC138D is 47 ns typ and 150 ns max when the temperature is +25 and Vcc is 2.0 V;(4):output transition time is 19 ns typ and 75 ns max when thetemper- ature is +25 and Vcc is 2.0 V.