74HC253

Features:

• Non-inverting data path
• 3-state outputs for bus interface
• and multiplex expansion
• Common select inputs
• Separate output enable inputs
• Output capability: bus driver
• I_CC category: MSI


Application

• Data selectors
• Data multiplexers


Pinout




Description

The 74HC253 is high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.

The 74HC253 has two identical 4-input multiplexers with 3-state outputs which select two bits from four sources selected by common data select inputs (S₀,S₁).

When the individual output enable (1OE, 2OE) inputs of the 4-input multiplexers of the 74HC253 are HIGH, the outputs are forced to the high impedance OFF-state. The "253" is the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels applied to S₀ and S₁.

The logic equations for the outputs of the 74HC253 are:

1Y=1OE(1l₀.S₁.S₀+1I₁.S₁.S₀+1I₂.S₁.S₀+1I₃.S₁.S₀)

2Y=2OE(2l₀.S₁.S₀+2I₁.S₁.S₀+2I₂.S₁.S₀+2I₃.S₁.S₀)