74HC283

Features: ·High-speed 4-bit binary addition·Cascadable in 4-bit increments·Fast internal look-ahead carry·Low-power dissipation·Complies with JEDEC standard no. 7A·ESD protection: HBM EIA/JESD22-A114-B exceeds 2000 VMM EIA/JESD22-A115-A exceeds 200 V.·Multiple package options·Specified from -40 °C...

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74HC283 Picture
SeekIC No. : 004250736 Detail

74HC283: Features: ·High-speed 4-bit binary addition·Cascadable in 4-bit increments·Fast internal look-ahead carry·Low-power dissipation·Complies with JEDEC standard no. 7A·ESD protection: HBM EIA/JESD22-A11...

floor Price/Ceiling Price

Part Number:
74HC283
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/28

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Product Details

Description



Features:

·High-speed 4-bit binary addition
·Cascadable in 4-bit increments
·Fast internal look-ahead carry
·Low-power dissipation
·Complies with JEDEC standard no. 7A
·ESD protection:
   HBM EIA/JESD22-A114-B exceeds 2000 V
   MM EIA/JESD22-A115-A exceeds 200 V.
·Multiple package options
·Specified from -40 °C to +80 °C and from -40 °C to +125 °C.



Pinout

  Connection Diagram


Specifications

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage   -0.5 +7.0 V
IIK input diode current VI < -0.5 V or VI > VCC + 0.5 V - ±20 mA
IOK output diode current VO < -0.5 V or VO > VCC + 0.5 V - ±20 mA
IO output source or sink current VO = -0.5 V to VCC + 0.5 V - ±25 mA
ICC VCC or GND current   - ±50 mA
Tstg storage temperature   -65 +150 °C
Ptot
power dissipation        
DIP16 package   [1] - 750 mW
SO16 and SSOP16
packages
  [2] - 500 mW

[1] Above 70 °C: Ptot derates linearly with 12 mW/K.
[2] Above 70 °C: Ptot derates linearly with 8 mW/K.



Description

The 74HC283 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC283 is specified in compliance with JEDEC standard no. 7A.

The 74HC283 adds two 4-bit binary words (An plus Bn) plus the incoming carry (CIN).

The binary sum appears on the sum outputs (S1 to S4) and the out-going carry (COUT) according to the equation:

CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) = = S1 + 2S2 + 4S3 + 8S4 + 16COUT
Where (+) = plus.


Due to the symmetry of the binary add function, the 74HC283 can be used with either all active HIGH operands (positive logic) or all active LOW operands (negative logic). In case of all active LOW operands the results S1 to S4 and COUT should be interpreted also as active LOW. With active HIGH inputs, CIN must be held LOW when no carry in is intended. Interchanging inputs of equal weight does not affect the operation, thus CIN, A1, B1 can be assigned arbitrarily to pins 5, 6, 7, etc.

See the 74HC283 for the BCD version.




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